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  • 學位論文

基於含參數佈局圖的電感設計與合成

Design and Synthesis of Inductors Based on Parameterized Layouts

指導教授 : 曾奕倫

摘要


本論文探討如何以含參數佈局圖方式針對螺旋電感進行佈局圖設計與佈局圖(Parameterized Layout)合成。我們所開發的電感產生程式可產生n圈電感佈局圖資料,其中包含限制條件(Constraints)與電感含參數佈局圖檔案。透過使用者輸入電感值,經Matlab軟體運算,求出非線性最佳解,再將其套用於電感參數佈局圖檔案,則可合成實際的電感佈局圖。此外,我們可運用旋轉以及翻轉之程式功能,將含參數佈局圖調整為90度、180度、270度、或水平翻面,以因應使用者需求。

並列摘要


This thesis discusses methods for designing and synthesizing layouts of inductors based on parameterized layouts. A computer program which is capable of generating parameterized layouts of inductors containing given numbers of turns has been developed. Also, relevant constraints can be generated by the program. After an inductance value has been given by a user, parameter values can be determined by a Matlab program. Therefore, physical layouts of inductors can be generated automatically. Additionally, in this research, we have shown that parameterized layouts can be flipped as well as can be rotated by 90゚, 180゚, or 270゚ by using a computer program.

參考文獻


[7] Sunderarajan S. Mohan, Maria del Mar Hershenson, Stephen P. Boyd, and Thomas H. Lee, “Simple Accurate Expressions for Planar Spiral Inductances,” IEEE Journal of Solid-State Circuits, Vol. 34, No. 10, pp. 1419-1424, Oct. 1999.
[2] I-Lun Tseng, “Partitioning parameterized 45-degree polygons with constraint programming,” ACM Transactions on Design Automation of Electronic Systems, 2008.
[3] Alan Hastings , The Art of Analog Layout, 2nd Edition, Prentice Hall, 2005.
[4] I-Lun Tseng, “Efficient Partitioning of Parameterized 45-Degree Polygons with Mixed ILP,” In Proceedings of In Proceedings of IEEE Region 10 Conference (TENCON), 2010.
[5] Zhi-Wen Wang, I-Lun Tseng, and Adam Postula, “Procedural Module Generation for Parameterized Layouts,” IEEE TENCON Spring, 2013.

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