We propose a cache design for an OpenFlow switch which implements datapath in hardware and search engine in software. By analyzing some of National Tsing Hua University traffic records from the Computer and Communication Center, we observe that flows and switch ports exhibit spatial locality. We propose a per-port cache design to take advantage of those spatial locality. The design is implemented in Verilog together with a C-based search engine. We evaluate our prototype with various cache configurations, traffic patterns and topologies. Compared with a popular software Open vSwitch , our per-port cache design improves switch performance with little overhead.