可擴充多核指令集模擬器之高效綜合時間同步技巧

An Efficient Hybrid Synchronization Technique for Scalable Multi-Core Instruction Set Simulation

曾柏翰(Bo-Han Zeng)

指導教授 ： 蔡仁松

國立清華大學/電機資訊學院/資訊工程學系/碩士(2012年)

https://doi.org/10.6843/NTHU.2012.00036

摘要

多核系統模擬技巧在近年來被廣泛的研究，我們發現傳統輪詢(polling)和交互(collaborative)同步方法，在目標核心(target core)多於家核心(host core)的狀況下，皆遭遇嚴重的擴充性(scalability)問題。為了解決這個議題，我們提出了一個有效的綜合時間同步技巧(hybrid timing synchronization technique)，它身兼輪詢及交互式的優點。根據我們的實驗結果，該項技巧有效地解決了擴充性議題，並且相較於傳統的方法，提供了良好的模擬速度。

關鍵字

時間同步 ； 多核模擬器

並列摘要

As the multi-core system simulation techniques are being extensively studied in recent years, we find that both the conventional polling and collaborative approaches all encounter a severe scalability issue when the number of target cores is more than that of the host cores. To resolve this issue, we propose an effective hybrid timing synchronization technique which combines the advantage of the polling and the collaborative approaches. According to the experimental results, the proposed technique effectively resolves the scalability issue and shows excellent simulation performance which is one to four orders of improvement against the conventional synchronization approaches.

並列關鍵字

Timing Synchronization ； Multi-core instruction set simulator

參考文獻

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