提升冗餘記憶體可靠度之增強切割演算法設計與分析

記憶體的容錯設計在增進記憶體產量方面，扮演著重要的腳色。為了達到提升可靠度的目的，有許多的方法被提出。而其中最廣泛為人所利用的技術之一，是以插入在記憶體中的冗餘記憶體來取代有瑕疵的記憶體單元。現今，雷射切割技術因為可以加強冗餘記憶體之使用效益，因此對於記憶體的產能有著提升的作用。然而，切割點的選擇明顯地影響到冗餘記憶體的利用率。不佳的切割點甚至是沒有作用的。為了解決這個問題，本篇論文提出兩個演算法。第一個演算法是使用於找出適當的切割點。此演算法修正了一些以前演算法的錯誤，並提出一個較為完善的方法來搜尋切割點。另外，因為大部分的啟發式求解演算法在記憶體被切割的狀況下無法正確運作，因此，為了得知錯誤樣本是否可以被修復，我們提出了第二個演算法，命名為Modification of Most-Repair (MMR). 實驗結果顯示我們提出的演算法在可靠度上有所提升，並且能更有彈性的運用冗餘記憶體。

關鍵字

冗餘記憶體切割

並列摘要

Fault-tolerant design for memory production is getting to play an important role in increasing the yield rate of manufacturing. To improve the reliability of memory manufacturing, there are many methods that have been proposed. One of the most used technologies is replacing the faulty cells with spare memory interleaved in the memory. Nowadays, the laser cutting technology improves the yield of memories because of the enhancement of the use of spare lines. However, the issue of choosing a cutting location significantly affects the utilization of spare lines. A bad cutting location can even render it useless. This thesis presents two algorithms to solve this problem. The first one is designed to seek out a good cutting location. It corrects some defects of previous algorithms and provides a better approach to find cutting candidates. In addition, because most heuristic solution-finding algorithms do not work properly under the condition of cutting memory, the second algorithm, called Modification of Most-Repair (MMR) is proposed to help make the decision as to whether or not a solution exists for the faulty pattern. The experimental results show that our proposed algorithms improve the reliability of memory manufacturing and the flexibility of spare lines.

並列關鍵字

spare cutting approach ； Optimal Cutting for a SROM (OCS)

參考文獻

[28]F. Lombardi and W. K. Huang, “Approaches for the Repair of VLSI/WSI RRAMs by Row/Column Deletion,” Proceedings of Eighteen International Symposium on Fault-Tolerant Computing (FTCS-18), Tokyo, Japan, pp.342-347, June 1988.

[39]C. T. Huang, C. F. Wu, J. F. Li, and C. W. Wu, “Built-In Redundancy Analysis for Memory Yield Improvement,” IEEE Transactions on Reliability, vol. 52, issue 4, pp.386-399, December 2003.

[6]T. W. Tseng, J. F. Li, C. C. Hsu, A. Pao, K. Chiu, and E. Chen, “A Reconfigurable Built-In Self-Repair Scheme for Multiple Repairable RAMs in SOCs,” Proceedings on IEEE International Test Conference 2006 (ITC 2006), Santa Clara, CA, pp.1-9, October 2006.

[7]J. F. Li, J. C. Yeh, R. F. Huang, and C. W. Wu, “A Built-In Self-Repair Design for RAMs with 2-D Redundancy,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, issue 6, pp.742-745, June 2005.

[8]B. A. Izadi, and F. Ozguner, “Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor,” IEEE Transactions on Computers, vol. 52, issue 11, pp.1443-1453, November 2003.

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提升冗餘記憶體可靠度之增強切割演算法設計與分析

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