具埋藏穿透矽晶片導線的微機電元件之開發及其於三維封裝與整合之應用

Implementation of TSV Embedded MEMS Device for 3D Packaging and Integration

林炯文(Chiung-Wen Lin)

指導教授 ： 方維倫

國立清華大學/工學院/奈米工程與微系統研究所/博士(2010年)

https://doi.org/10.6843/NTHU.2010.00315

摘要

在消費性電子產業的帶領下，縮小化與多功能實為電子元件的一大難題。而藉由微加工技術的感測功能與整合能力，將有助於解決此一難題。現今多功系統的整合皆是透過系統級封裝(System-in-Packaging，簡稱SiP)的異質整合技術來達成目的。本研究希望依此架構，來研發易於垂直整合的微機電元件，不管是應用於微元件的封裝亦或是微元件的三維整合，皆希望透過穿透矽晶片導線(Through-Silicon Via,簡稱TSV)來達成，核心技術將是利用TSV來貫穿矽晶圓，達成三維微機電元件的製造與封裝。所以本論文將會以埋藏TSV的微機電元件為主軸，可以達成晶圓級封裝微機電元件之外，亦可以自行堆疊達成多功微系統。首先第一部分將以電鍍金屬的方式來製作TSV，並展示出其與SOI-MEMS元件的整合潛力，並利用陽極接合的方式完成整各微機電元件的封裝。第二部份將進一步利用新型的玻璃回融技術，製造出低阻值的單晶矽TSV，整合SOG-MEMS元件在埋藏有垂直導線的玻璃晶圓上，製造出的元件不但可以直接堆疊，並且也可以利用晶圓接合的方式完成封裝。第三部份將會利用玻璃回融技術製造出具有埋藏垂直導線的玻璃探針陣列，利用TSV的技術，將二維的探針陣列垂直堆疊而製造出三維的探針陣列，以作為生物或是神經訊號的探取工具。

關鍵字

穿透矽晶片導線 ； 微機電封裝 ； 微探針陣列

並列摘要

Due to the development of portable consumer products, minimization and multi-functions of an electronic device is the next challenge for the semiconductor industry. Sensing function and integration compatibility provided by micromachining technology is the promising technique to overcome those issues. Also, nowadays a heterogeneous integration microsystem could be achieved by System-in-Packaging (SiP) based on micromachining technology. This research focuses on the development of the microdevice which is suitable for heterogeneous integration. Through-Silicon Via (TSV) technology was applied to implement this goal in applications like three-dimensional packaging and integration of microdevice. The core technology is to embed TSV inside MEMS substrate wafer to fabricate MEMS device and packaging. This research will utilize the MEMS device with embedded TSV, either in wafer-level packaging (WLP) and multi-functions microsystem by stacking vertically. In the first part of this research, TSV fabricated by metal electroplating was achieved. And integration of this technique in SOI-MEMS wafer is demonstrated. Then anodic bonding was combined in process flow to achieve WLP of single-crystalline silicon device. In the second part of this research, a novel glass reflow technology was utilized to fabricate low-resistivity silicon TSV. SOG-MEMS device with embedded TSV was fabricated. Both of those devices are 3D stacking compatible and WLP can be achieved by wafer bonding technology. Third part of this research is glass microprobe array with embedded silicon vias by glass reflow technology. By TSV technique, 3D microprobe array, as a probing tool for biological and neural signals, can be accomplished by stacking of 2D microprobe array.

並列關鍵字

Through-silicon vias ； MEMS Packaging ； Microprobe array

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