Face detection is widely used in many automated systems, as the preceding step of vision-based applications, such as face recognition, face tracking, and human computer interface. Numerous techniques have been proposed to detect the appearances of faces in a single image, including software and hardware design. In this thesis, we present a face detection architecture based on a boosted cascade algorithm. We propose the two-field and reduced two-field feature extraction scheme for integral image calculation. Based on the reduced two-field extraction scheme, the required memory size is reduced from 400kbit to 1.8kbit. In addition, we use the parallel processing in classifier evaluations to enhance the processing speed by three times. This design achieves the detection accuracy as other systems with high speed and low memory cost. Under the UMC 90 nm technology, this system can run at 200MHz with the area of 0.279 mm2, and process 160╳120 gray scale images at the speed of 500 fps.
在許多自動化系統之中,人臉偵測的技術都被做為各種視覺應用的前置作業,而被廣泛地使用,例如人臉辨識,人臉追縱以及人機介面等等。在單一影像中偵測人臉的各種方式被相繼提出,包括了軟體及硬體的方式。 在這篇論文中,我們以漸近式階層演算法為基礎,提出了人臉偵測的硬體架構。我們採用了雙域特徵截取,進行累積圖的計算。藉由簡化後的雙域特微截取,累積圖所需的記憶體,可以由原本的400kbit縮減至1.8kbit。除此之外,我們在進行分類檢測時採用平行運算,將計算速度提升為原本的三倍。這個設計可以達到和其它系統相同的偵測正確率,同時具有高速度和低記憶體的優點。使用UMC 90 nm的製程,這個系統的面積為0.279平方公釐,能以200MHz的時脈運作,並且以500fps的速度處理160╳120的灰階影像。