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  • 學位論文

最小化串音效應之多階層式繞線方法

A Multilevel Routing Algorithm for Crosstalk minimization

指導教授 : 陳美麗
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摘要


由於製成的技術不斷的進步,半導體元件在越來越小的佈局面積下,卻要求越驅複雜的功能、越加快速的切換頻率,進而使串音效應(crosstalk)對於電路在功能與時序上的影響與日俱增,成為在設計電路時相當重要的一項考量因素。 本篇論文使用了近年來廣泛被討論的多階層式繞線架構,並且對於導線間的串音效應降低為主要的繞線考量。在廣域繞線階段,採用L shaped及Z shaped之pattern routing繞線方法,除了擁擠度的考量外,利用轉換時間(slew time)資訊,避免將容易形成串音效應的導線配置於相同的廣域繞線路徑上,以此降低未來形成相鄰導線的可能性。而在細部繞線階段,我們則是利用傳統的maze繞線方法,並且同時考量兩導線間slew time與的平行線段長度和距離間的關係,此外對於繞線過程中所形成的via也一併加入我們細部繞線的成本函數。 實驗結果可以發現,本論文所提出的方法與一般只考量降低平行線段長的crosstalk-driven的繞線方法比較下,在降低整個設計電路的因串音效應所產生的耦合電容上可降低約11%,而在via數也可降低約18%,在降低fail net數目產生也約有50%改善,繞線完成度平均都達到99%以上。

並列摘要


As the process technology progressing, the VLSI circuits are requested to work with more complex functionality and faster switching frequency within a smaller die size. Therefore the crosstalk between interconnect wires has become an important issue, it has serious influences on functionality and timing. In this paper, we utilize a multilevel routing structure to reduce the crosstalk effect between neighboring parallel wires. In the global routing stage, we adopt the L-shape and Z-shape pattern routing methodology. We not only consider the routing congestion in this stage, but also make the long slew time nets and short slew time nets separate. In the detail routing stage, we use the modified maze search route algorithm which simultaneously consider the coupling capacitance (considering slew time、coupling length and coupling distance) and via number during the maze routing processing. In the experiments, we use the real circuit cases as our test cases. Compared with the routing algorithm which only try to reduce the neighboring parallel wires, our algorithm can produce the routing with 11% lower coupling capacitance value and 18% lower via number. Besides, our algorithm decreases 50% fail net number. The most important is that the completion rate is over 99% in these test cases in which the row utilizations are about 80%.

參考文獻


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