採用軟硬體相互模擬實現基於長程演進技術下鏈路系統之收發機

本論文採用軟硬體相互驗證的方式來實現LTE實體層下行鏈路(Downlink)在分頻雙工(Frequency Division Duplexing, FDD)模式下之系統收發機的主要模塊，並使用System Generator套件搭配Simulink來快速雛形化此系統。首先，吾人撰寫各模塊相對應之MATLAB程式做為各個主要模塊設計參考，接著，我們利用System generator進行各個模塊及系統的設計。在傳送端，吾人設計封包控制電路來產生並控制訊號做為LTE規格的發射訊號訊框，接著實現偽隨機序列訊號產生模組及QPSK調變模組以及IFFT模組來產生OFDM訊號。在通道端，我們實現非頻率選擇性的多路徑衰減通道。而在接收端，我們實現封包偵測模組及小數載波頻率偏移估測及補償模組，達到時間及頻率的同步。接著利用FFT模組完成OFDM解調並實現以DFT-base為主的通道估測。最後，吾人將此LTE系統的傳送端及接收端透過合成工具ISE轉化為可合成的bitstream檔並將此檔案下載至通訊開發版(WARP)上的FPGA(Virtex-4)，完成電路驗證。

關鍵字

正交分頻多工系統；長程演進技術；軟硬體相互驗證；分頻雙工系統；下鏈路分享通道

並列摘要

In this thesis, we employ the hardware-software co-simulation scheme to implement some critical blocks of the LTE downlink transceiver in the frequency division duplexing (FDD) mode. We adopt the Simulink® and System Generator® tools for rapid prototyping the system. We first program the MATLAB codes of each building block and simulate each block function as for design reference. Then, we simulate each and whole system blocks by using System Generator®. In the transmitter, we design a packet control circuit in the LTE’s transmitter end to generate control signal of the transmitted signal frame. We then implement pseudo-noise binary generator and quadrature-phase-shift keying (QPSK) symbol-mapping circuits, and use the inverse fast-Fourier transform (IFFT) module of the System Generator® to generate orthogonal frequency-division-multiplexing (OFDM) signal. In the channel end, we use the multipath fading channel module for generating frequency-selective channel. In the receiver end, we implement packet detection module and fractional carrier frequency offset estimation and correction modules, for timing and frequency synchronizations. Next, we implement DFT-based channel estimator module and use the FFT module for realizing the downlink LTE’s demodulator. Finally, for hardware verification, we transfer the LTE’ transmitter and receiver into bitstream files by using the ISE design suite, and download the file on the WARP software defined radio platform to verify the correctness of the downlink LTE-based system.

並列關鍵字

System Generator ； Xilinx ； LTE ； PDSCH ； OFDM ； software-hardware co-simulation

參考文獻

[1] 3GPP TS 36.101 V8.4.0 (2008-12) Evolved Universal Terrestrial Radio Access

[2] 3GPP TS 36.213 V10.3.0 (2011-09) Evolved Universal Terrestrial Radio Access (E-UTRA);Physical layer procedures(Release 10).

[4] 3GPP TS 36.211 V10.3.0 (2011-09) Evolved Universal Terrestrial Radio Access (E-UTRA);Physical Channels and Modulation (Release 10).

[6] Magnus Sandell, Jan-Jaap van de Beekand Per Ola Borjesson, “Timing and Frequency Synchronization in OFDM Systems Using the Cyclic Prefix, ” December, 1995.

[7] Hone-Wei Tang, “Implementation of a Configurable Multipath Fading Channel Emulator on Altera Stratix FPGA Development Board,” July, 2006.

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採用軟硬體相互模擬實現基於長程演進技術下鏈路系統之收發機

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