以SOPC為基礎架構發展聰明型攝影機—影像擷取，形態運算

Developing Smart Cameras Based on SOPC Infrastructure—Image Acquisition, and Morphological Operations

陳韋金(Wei-Chin Chen)

指導教授 ： 黃文吉 ； 賴飛羆

國立臺灣師範大學/理學院/資訊工程研究所/碩士(2004年)

摘要

目前的監視系統大都使用攝影機來做為監視的工具，然而此類的攝影機是將影像擷取後送至主控室，由監視人員透過監視人員透過螢幕來做監視，如此對監視人員的精神實在是一大負荷。較先進的監視系統會先將攝影機所擷取的影像透過電腦系統加以分析，以達到自動監視的目的，然而此種監視系統需要大量的電腦設備。

本論文的目的是想發展一種聰明型攝影機，希望此類聰明型攝影機能夠自己去分析、偵測可疑的目標物，最後再將此目標物的特徵及位置傳回電腦端。如此監視系統即不用監視人員緊盯著螢幕監視，也無須龐大的電腦設備即可達到自動監視的目的。

本論文中我們以硬體設計了一個CMOS攝影機的控制界面電路，可以直接讀取攝影機所拍攝到的影像。另外也設計了一個可程式規劃(programmable)的型態運算(morphological operation)電路，可以對所擷取的影像做處理。為了驗證所提出的架構可以即時的處理，我們也設計了一個VGA顯示器控制界面，可將運算後的結果以灰階影像直接顯示在螢幕上。整個系統的發展是以SOPC (System On Programmable Chip)為平台，利用硬體描述語言(Hardware Description Language)所發展而成。

關鍵字

攝影機 ； 可程式規劃 ； 型態運算 ； 硬體描述語言

並列摘要

Presently, most cameras are used to supervise as a monitor system. As the camera captures the images, it transmits the images to spotters as soon as possible. However, it is neither smart nor efficient to supervise the images by supervisors. In order to supervise automatically, an advanced monitor system can analyze the obtained images through the monitor system itself. At the same time, a large number of computer devices are required in such a monitor system.
The main idea for this thesis is to develop a smart camera. The camera is capable of detecting the wanted objects and analyzing. Then transmit the related information of the objects like features and position to the receiver without delay. Without staring the monitor screen all the time by the supervisors, the smart camera achieves supervising automatically. Obviously, the cost is reduced due to the less devices.
In this thesis, we design a camera controller of the CMOS camera by hardware. The controller reads the images directly. Besides, we add a programmable morphological operation to process images. For verifying the real-time processing system, the Lancelot VGA controller is improved to display the result in grayscale image through the monitor screen. The platform is based on SOPC (System On Programmable Chip) with using hardware description language to develop the system.

並列關鍵字

CMOS camera ； programmable ； morphological ； SOPC

參考文獻

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[2] J. Velten, A. Kummert, “FPGA-based Implementation of variable sized structuring elements for 2D binary morphological operations,” IEEE Electronic Design, Test and Applications, 2002.

[6] B. Dalay, “Accelerating System Performance using SOPC Builder,” SOC International Symposium, pp.3-5, Nov. 2003.

[7] M. Finc and A. Zemva, “Rapid HW/SW Co-design of Softcore Processor Systems,” IEEE Region 8 Computer as a Tool, vol.1, pp.104-108, Sept. 2003.

[8] Takashi Komuro, Idaku Ishii, Masatoshi Ishikawa, and Atsushi Yoshida, “A Digital Vision Chip Specialized for High-Speed Target Tracking,” Electron Devices, IEEE Transactions on Volume 50, issue 1, Jan. 2003 Page(s):919-199.