考慮電壓島產生之低功率平面規劃方法

Low power floorplanning methodology considering voltage island generation

李泓懌(Houng-Yi Li)

指導教授 ： 陳宏明 ； 江蕙如

國立交通大學/電機學院/電子工程系所/碩士(2009年)

https://doi.org/10.6842/NCTU.2009.01090

摘要

隨著製程技術進入了奈米的紀元，以往隨著製程縮小所得到的功率節省也因此慢下來；然而，在現代的設計中，高時脈頻率和複雜的功能造成顯著的功率密度增加。多重供應電壓是一項可以平衡功率和效能的既普遍又有效率的技術。考慮多重供應電壓的技術，我們把一個設計分割成多個電壓島，每個電壓島分別在平面規劃上佔有它的區域並且工作在一個特定的電壓。 在這篇論文中，我們把電壓島的產生跟平面規劃合併在一個有效率並且使用決定論演算法的平面規劃器裡面。給予一組區塊和所對應的可工作的電壓，我們使用動態規劃去產生一組已經有電壓指定並且功率消耗已經被降至最低的平面規劃。與前人的作品比較起來，實驗結果顯示我們的演算法在執行時間和功率消耗上可以保證有絕對的勝出，尤其在比較龐大的設計上。

關鍵字

低功率 ； 平面規劃

並列摘要

As technology advances into nanometer era, the power benefit from process scaling slows down; however, the high clock rate and the complex functionality of a modern design result in a significant growth in power density. Multiple supply voltage is a prevalent and effective technique to balance power and performance. Considering multiple supply voltage, a design is divided into voltage islands, where each island occupies a physical region of the floorplan and operates at a certain level of supply voltage. In this thesis, we combine voltage island creation with floorplanning based on an efficient and deterministic floorplanner. Given a set of blocks and the acceptable voltage levels for each block, we use dynamic programming to generate a floorplan with voltage assignment such that power consumption is minimized. Compared with prior work, experimental results show that our algorithm is promising in running time and power, especially for large design cases.

並列關鍵字

low power ； floorplan

參考文獻

[3] R. H. J. M. Otten, “Automatic Floorplan Design,” Proceedings of Design Automation Conference,1982, pp. 261-267.

[10] R. H. J. M. Otten, ”Efficient Floorplan Optimization, “ Proceedings of International Conference on Computer Design, 1983, pp. 499–502.

[1] P. Coussy, A. Baganne, and E. Martin, “A Design Methodology For Integrating IP Into SOC Systems,” Proceedings of the IEEE, 2002, pp. 307-310.

[4] W. P. Lee, H. Y. Liu, and Y. W. Chang, “Voltage Island Aware Floorplanning for Power and Timing Optimization,” Proceedings of International Conference on Computer-Aided Design, 2006, pp.389-394.

[5] Q. Ma and E. F. Y. Young, “Network Flow-based Power Optimization under Timing Constraints in MSV-driven Floorplanning,” Proceedings of International Conference on Computer-Aided Design, 2008, pp1-8.