具有低摻雜Ｐ型緩衝層與穿透型Ｐ＋射源結構之600V穿透式絕緣閘雙極性電晶體

600 V PT-IGBT With Low Doping p-buffer Layer and Transparent P+ Emitter

林書賢(Shu-Hsien Lin)

指導教授 ： 辛裕明

國立中央大學/資訊電機學院/電機工程學系/碩士(2011年)

摘要

隨著節約能源環保觀念逐漸受重視，綠能科技也相對重要，在中、中高功率電子應用將積極投入研究。本研究將改善IGBT元件在電感負載時，關閉電壓、電流發生振盪的現象，且達到低導通壓降亦可不犧牲耐壓特性，使元件在電路應用上能達低功耗。
在元件設計上，採用垂直式結構擁有溝渠式閘極且運用最新的Field-Stop技術，其技術為背面離子佈植形成P+集極。此外結構中有兩層緩衝層，N+緩衝層形成的方式為離子佈植打入砷當摻雜物，回火活化後再繼續磊晶N-飄移區，所以此元件有比一般FS-IGBT還要厚的N+緩衝層，第二個緩衝層為P型比P+集極濃度低，此層為一開始選用之P型基板，此層介於N+緩衝層與P+集極之間，主要功用是改善振盪的現象。
此篇元件在導通壓降與順向耐壓之間折衷找出最佳的數值，在低導通壓降約1.29伏，集極注入效率為0.28，在如此低注入效率的情況下亦可抑止振盪的現象產生，順向耐壓可達約710伏。

關鍵字

低導通電壓 ； 振盪 ； 溝渠式閘極

並列摘要

The concept of energy conservation has become more and more respected. Due to the importance of green energy, medium and medium-high power electronics applications have been concerned. In this study, the proposed devices have no oscillation when turn-off in inductive load and also achieve low on-state voltage without sacrificing forward blocking drop so as to realize lower power consumption in circuitry applications.
The design of the proposed devices adopted vertical structure with trench gate using Field-Stop technique, implantation from backside of the wafer to form the P+ collector. Additionally, there are two buffer layers in this structure, N+ buffer layer is formed by implantation and As as the dopant after annealing to activate then go on epitaxying the N-drift region. So there is thicker N+ buffer layer in this structure than typical FS-IGBT. The second buffer layer is P-type, the concentration is lower than P+ collector, this layer is the initial substrate and between N+ buffer layer and P+ collector interface in order to improve oscillation phenomenon.
We found a tradeoff between on-state voltage and forward blocking drop. On-state voltage is about 1.29 V as injection efficiency at 0.28, in this low injection situation also can suppress oscillation phenomenon when turn-off and forward blocking voltage is approximate 710 V.

並列關鍵字

oscillation ； low on-state voltage ； trench gate

參考文獻

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