投機式發出邏輯

Speculative Issue Logic

蔡祐展(You-jan Tsai)

指導教授 ： 謝忠健

大同大學/電機資訊學院/資訊工程學系所/碩士(2005年)

摘要

在現今的電腦中，為了提高效能，絕大數的處理器使用超純量架構及提高工作頻率的方法。超純量架構可讓兩個以上的指令在每個工作週期內被同時執行。因此指令的平行度將變得愈來愈重要，每當超純量架構的發出指令數更加深時。有些研究所提出的方法裡[6, 14]，指令可被投機式喚醒。愈多指令被投機式喚醒，也就可以開發出更高的指令平行度，也就代表著每個工作週期所能完成的指令數將會更多。但當我們採用投機式喚醒的機制喚醒更多指令時，指令平行度還是被指令之間的資料相依關係所限制著。
　　在這篇論文中，提出了一個機制，同時結合了投機式喚醒及資料預測的方法，用來克服指令之間的資料相依關係，開發出更高的指令平行度。而且為了減少恢復機制的發生次數，我們也同時提出了用兩位元計數器為優先權的選撰邏輯。在我們的實驗結果中，我們的模組將會有平均約18.2%的效能增進。

關鍵字

投機喚醒、發出邏輯、資料預測

並列摘要

In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than one instruction per each cycle. The amount of instruction level parallelism will become more and more important when superscalar issue is increased. In some schemes [6, 14], instructions can be speculatively waked up. The more instructions are waked up, the more ILP is exploited, hence IPC is increased. We can adopt the speculative aspect to wakeup more instructions. But the ILP is still limited by the true data dependency.

並列關鍵字

speculatively waked up、issue logic、value predi

參考文獻

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[9] F. Gabbay, and A. Mendelson. “Speculative Execution Based on Value Prediction.” EE Department TR 1080, Technion - Israel Institute of Technology, Nov. 1996.