本論文設計一顆可變增益放大器(Programmable Gain Amplifier, PGA),內由數顆放大器串接而成,並包含共模回授電路(Common mode feedback, CMFB)、參考電流電路與緩衝器(Buffer)。其中共模回授電路是包含在放大器中,其功能是為了防止電晶體進入三級區,並且也穩定各級放大器的輸出電壓,保證每一級放大器輸入電壓也呈穩定狀態。 本論文採用TSMC CMOS 0.18μm 製程,驅動電壓1.8V,功率消耗約15mW,其增益由開關控制,當溫度計碼(Thermometer code)由11111111轉至00000001,增益範圍由13dB至86dB,每10dB變動一次增益,頻寬約150MHz,抵補電壓(Offset)小於40mV,雜訊 ,最後總諧波失真約-53dB,晶片面積 0.896×0.524mm2,晶片核心面積0.588×0.093mm2。
This thesis presents designing a programmable gain amplifier (PGA), which is comprised of several amplifiers including common mode feedback circuits (CMFB), reference circuit and buffer. The common mode feedback circuits prevent any of the transistors from entering linear mode operation and maintain a specific dc value for the biasing of the next stage. The PGA was fabricated in TSMC 0.18μm CMOS technology and total power dissipation is 15mW at 1.8V supply, providing a gain range from 13 to 86 dB with 10dB step when the control switch varies from 11111111 to 00000001 with thermometer code. The -3dB bandwidth is about 150MHz. DC offset is less than 40 mV at the output regardless of the input. The input referred noise is . The distortion is better than -53dB for 80mVP-P output signal. The PGA occupies 0.896×0.524mm2 die area, and the core area is 0.588×0.093mm2。
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