進階交換協定之功能驗證環境

A Functional Verification Environment for Advanced Switching

黃鼎鈞(Ting-Chun Huang)

指導教授 ： 郭斯彥

國立臺灣大學/電機資訊學院/電機工程學研究所/碩士(2004年)

https://doi.org/10.6342/NTU.2004.00179

摘要

隨著電腦技術的進步，如何將周邊設備連接到電腦上已逐漸成為研究的重心。在過去多年，晶片內的設計一直是硬體設計上主要的研究領域，帶來運算能力每年數倍的成長。但相對上來說，晶片間的資料溝通，甚至是不同系統間的溝通，並無同等的進展。漸漸地，晶片間的溝通速度成為了運算上的瓶頸。
PCI, PCI-X, PCI-Express三者簡述著我們在晶片溝通上所做的研究努力。從PCI到PCI-X，我們經由增加時脈頻率和分匹傳送來增加效能；從PCI-X到PCI-Express，為了增加傳輸時脈，傳統上以匯流排的連接方式，被新一代的點對點連接所取代。藉著這個本質上的改進，我們成左獐W加傳輸機制的產能。
但是，不同系統間的資料溝通，包含釵h繁鎖及耗時的格式轉換。在n個協定間，如果須自由轉換，就必須有n(n-1)/2種不同的轉換介面。尤其當n很大時，使得沒有限制的自由溝通變得不可行。此外，一個封包非常可能經過數個不同的協定，不同協定間不必要的格式轉換，將耗費釵h寶貴的運算能力及時間。因此，進階交換協定引進了隧道轉送(tunneling)的方式。在隧道轉送(tunneling)的方式之下，封包在傳輸的過程中，就不須要經過層層的格式轉換。
除了這個協定透明化的特質外，用來連接不同系統及不同周邊的進階交換協定，引進了釵h新的運作方式。包括了容易轉送，以及對交通阻塞的解決方法。延續了PCI Express的實體層及資料連接層，電源管理及熱插拔，進協交換協定保留了PCI Express各種優越的特性。這些特性，讓進階交換協定在架構上更具彈性，運轉上更有效率，並且更可靠。
隨著溝通協定提供越來越多的弁遄A對於新系統的驗證也越來越複雜耗時。分層協定，虛擬通道，和電源管理等新的特性，大大的增加我們驗證系統的負擔。在此，我們提出一個用來驗證進階交換協定的架構。我們先模仿真時情境，建立一個環境，和其中各元件的模型。藉由檢驗待測元件的各種性，和資料完整性，我們成左瘍褌狳銋鴾ㄕP情境的相容性。
最後，我以一個驗證環境應具備的特性來做個總結。對與錯的封包，讓人一目膫然的連接方式，以及釵h提供驗證彈性的機制都整理在這裡。除了在進階交換協定之驗證環境中，這些特性在各種便利且有效的硬體驗證環境中，都不可或缺。

關鍵字

進階交換協定 ； 驗證環境 ； 驗證

並列摘要

How the peripherals are connected to our computing systems, say computers, becomes critical as our technology advances. Intra-chip design has long been the main research area for the past years, resulting in several folds of computing power increase per year. In contrast, the speed of cross-chip connection, or even cross-system connection, has not been enhanced at the same rate, and gradually became the bottleneck of current computing systems.
PCI, PCI-X, and PCI-Express epitomize the evolvement of our peripheral connecting strategy. From PCI to PCI-X, performance is increased by clock rate enhancing and inclusion of split transaction. From PCI-X to PCI-Express, traditional bus architecture is replaced by point-to-point connections to enhance clock rate of single wire. By radical change in architecture, we successfully increase throughput of connection facilities in one autonomous system.
However, to communicate among systems with different protocol must involve many tedious works of format conversion. The number of protocol converters required to convert n different protocols is n(n-1)/2, rendering unrestrained communication impossible when n is very large. Besides, during transmission a packet may go through several different protocols and a lot of power is wasted in packet conversion. Thus, Advanced Switching (AS) introduces the concept of tunneling, in which packets need not to change its format during their transmission within AS connections.
As well as transparency, Advanced Switch architecture, aiming at connecting systems and peripherals, is distinguished in its easy routing, congestion management. Inherited from PCI-Express PHY and DLL, virtual channel and traffic class, and power management and hot plug, Advanced Switch retains all of PCI Express’s superior features. These features makes AS more flexible, more efficient, and more reliable.
As the connecting protocol provides more complex capabilities, the verification of the corresponding systems grows harder and more time-consuming. New features, layered protocol, virtual channel, and power management for example, greatly increased the efforts in checking a design’s functional correctness. Here, we propose a architecture for verifying Advanced Switch hardware. We first construct an environment simulating real connection, and the bus functional model of the connecting components. By checking DUT’s (design under test) packets’ congruence in physical layer protocol, data link layer protocol, transaction layer protocol, and data integrity in aperture space, we successfully verify the compliance of the design under test’s features to the given protocol.
This thesis starts with a brief review of PCI Express and Advanced Switching. Then, the verification models and implementation details are put in Chapter 3 and Chapter 4. Finally, I conclude with the core elements necessary for a practical verification environment in Chapter 5. Both valid and invalid behavior, convenient way to connect, and several mechanisms for testing flexibility are summarized here. Besides Advanced Switching verification environment, these elements are indispensable in any convenient and effective verification IP.

並列關鍵字

Verification IP ； Verification Environment ； PCI Express ； Advanced Switching ； Verification

參考文獻

[10]T. Kuhn, T. Oppold, M. Edwards, Y. Kashai, M.

[9]Bernd Stöhr, Michael Simmons, Joachim Geishauser,

[2]ASI-SIG, “Endpoint Compliance Checklist for the

Advanced Switching Core Architecture Specification

Revision 0.9,” January 6, 2004.