智慧型監控系統中物件追蹤平台之演算法及硬體架構設計

Algorithm and Hardware Architecture Design of Video Object Tracking Framework for Smart Surveillance Network

曾鈺翔(Yu-Hsiang Tseng)

指導教授 ： 簡韶逸

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2009年)

https://doi.org/10.6342/NTU.2009.02822

摘要

近年來監控系統的使用大幅地成長，因此，監控系統中之智慧型功能也會變得越來越重要，例如物件追蹤、前景分割以及人臉偵測等等，否則我們必需要從冗長的監視影像中花費很多時間及精力來得到我們所想要的資訊。
而在追蹤的演算法中，我們發現物體在經過光影變化或是有著與物體相似色的地方時，追蹤的演算法容易出現問題。因此我們改進現有的粒子濾波器框架並設計出一個能夠處理這兩種問題的追蹤演算法。
以外，我們設計了一個協處理器來處理及時運算，並且能夠支援並加速包含我們所提出之追蹤演算法在內的一些常用在智慧型監控系統中的演算法。我們使用了子字平行、資料串流以及硬體共享的技術來解決現今多媒體處理器常會遇到的問題：高產量需求、高頻寬需求、可程式化以及低成本。在我們的硬體中，支援一些基本的圖型運算如直方圖累積、CORDIC等等。而基於我們的硬體設計，可以使用我們的硬體來加速如物件追蹤、前景分割、人臉偵測、行為辨識等等的演算法。並且，這協處埋器是可重組化且可以用來當作是新演算法的測試平台。
原型晶片利用聯華電子90nm技術製成，面積為3.26×3.26mm^2，其工作頻率為125MHz，最大消耗功率為33.3 mW。而此晶片最多可以在640×480、每秒30張、YUV 4:2:0的影像輸入中同時追蹤10個物件。並且，由於使用子字平行技術，我們可以省下約60.28%的晶片記憶體。

關鍵字

物件追踪可重組化硬體架構設計 ； 協處理器 ； 智慧型監控系統 ； 粒子濾波器

並列摘要

Surveillance systems are widely used today and the number of employed cameras increases. The intelligent functions in surveillance are more and more important for helping user inspecting the video content. Among the intelligent functions, tracking and segmentation are the most widely used. In this work, we try to address the problems that will happen when we want to track video objects under light condition changes and video objects with background-alike color. We proposes a enhanced particle filter framework that can handle these two kind of problems. Moreover, in order to achieve the real-time applications, we also design a hardware coprocessor that can support most of the operations used in intelligence surveillance system, including those operations used in our proposed algorithm.
In order to overcome the typical hardware design challenge in accelerating vision algorithms, such as high throughput requirement, high bandwidth requirement, programmability and low cost,
we employ sub-word level parallelism, streaming based processing, and hardware sharing techniques. In this design, basic image processing operations, such as histogram accumulation, CORDIC, window operations, are supported. Specific operations, such as those in video object segmentation, are also supported. Based on the hardware design, many applications, such as tracking, segmentation, face detection, feature detection and description, and motion analysis, can be accelerated.
This coprocessor is reconfigurable and it can be used to test the new developed algorithms. We also implement the hardware coprocessor as a chip with standard cell based design flow. The prototype chip is fabricated with UMC 90nm technology. The chip size is 3.260 x 3.260 mm^2.
The external bandwidth is estimated, and the chip can support video object segmentation and, at the same time, tracking 10 objects in 640 x 480 30 fps 4:2:0 YUV color sequence with 125 MHz clock frequency and 33.3mW power consumption. Moreover, with sub-word level parallelism, the on chip memory saving is 60.28%.

並列關鍵字

Object tracking ； reconfigurable hardware architecture design ； intelligence surveillance system ； coprocessor ； particle filter

參考文獻

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