本論文旨在研究與開發適用於數位廣播系統頻率標準(470MHz-862MHz)之低雜訊放大器,其具有高接收動態範圍能力。在設計方面,主要針對兩個問題作深入討論;第一個考量的是電路不穩定現象(K<1),為了獲得高增益必須採用多級串接式放大器,容易造成電路不穩定現象;第二個則是考量增益平坦度不佳問題,因為在串接兩級低雜訊放大器之後,可能形成增益平坦度不佳的問題。本論文將針對上述兩個問題提出解決方案,即在串接後的低雜訊放大器之間置入一個以電感、電容、電阻元件所構成之中間級(Inter-Stage)電路,依量測結果顯示,本研究所設計之串接式低雜訊放大器具有低雜訊(NF<1)、高增益( Gain =40±0.5dB)、增益平坦度低於1 (Gain Flatness <±0.5dB) 與無條件穩定(K>1)等特性,其功耗0.9W並適用於數位廣播電視頻率(470MHz-862MHz)之接收機放大電路。
This thesis focuses on the research and development of cascade low noise amplifier circuit that works with high dynamic input rang and suits for Digital Vedio Broadcasting-Terrestrial(DVB-T) frequency. There are two interest topics in this thesis, one is the unstability that caused by high linear gain of cascade low noise amplifier. Two is the gain flatness degradation which occurs with cascade LNA, This thesis proposes a solution to slove with those two issues, that is a inter-stage circuit considered with passive inductor, capacitor and resistor components. The goal of the cascade LNA not only obtain an unconditional stability, but also has good gain flatness. The measurements present that the proposed cascade LNA possesses low noise figure(NF<1), High gain(40±0.5), good flatness(±0.5dB), and unconditional stable (K>1) with respect to the frequency from 470 to 862MHz for DVB-T receiver system.