用於雲端系統之嵌入式硬體開機介面程式的設計與實作

這篇論文是實作型的論文，分成兩部分；第一個部分是設計並實作開機介面程式，此開機介面程式會在Client端PC開機時，負責提供使用者介面並建立與嵌入式系統韌體溝通的管道，然後安裝嵌入式硬體平台及它的Service Routine到PC裡頭，使PC能透過硬體平台進行遠端開機並載入作業系統直到SCSI driver接手為止。程式設計時須按照PC開機流程的各項規範及PnP Option ROM的格式規定來實作，儘量降低與各廠牌PC不相容的機率，同時也要達成委託單位對使用者介面的規劃及功能。第二個部分是設計並實作嵌入式硬體平台，此硬體平台會被用來驗證開機介面程式是否能正常運作。首先我們會討論此硬體平台的設計：包含系統核心SoC的選擇，整體架構的設計，系統參考時脈的設計，DDR2 SDRAM子區塊的設計，MPP功能的規劃及設計，NAND Flash子區塊的設計，乙太網路實體層介面的設計，三個串列高速介面：PCI Express、SATA及USB的設計，與最後整個電源供應的規劃及設計。接著在硬體真正實作出來後，利用儀器來檢驗各硬體區塊的訊號完整度是否有符合業界的規範。

關鍵字

開機介面程式； PC開機流程；嵌入式硬體；串列高速介面；訊號完整度

並列摘要

This thesis consists of two parts. For part 1, we design and implement an Option ROM image. When PC turned on, this image will offer a user interface, establish a communication with embedded system, install hardware device and its service routine, so that PC can boot and load OS from server through hardware device till OS driver takes over. In this part, we have to follow the rules of “PC Boot Sequence”, comply with the format of “PnP Option ROM”, reduce incompatible issues, and design a user interface that meets all requirements in this project. For part 2, we design and implement an embedded hardware in a cloud environment. The role of this hardware is to be a bridge between front-side “Option ROM/Driver” and rear-side “Server/Storage”. We design whole hardware architecture: include choice of SoC, system clock, DDR2 SDRAM, MPP, NAND Flash, Ethernet PHY, PCI Express, SATA, USB, and power supply. When implementation is done, we measure all kinds of signal integrity just mentioned before, and make sure they are compliance with respective specifications.

並列關鍵字

Option ROM image ； service routine ； embedded hardware ； signal integrity

參考文獻

5. Yi-Cheng Chung, “Design and Implementation of an iSCSI Storage Protocol on HBA Initiator,” Master thesis of Science, Electrical Engineering, Institute of Computer and Communication, National Cheng-kung University, Taiwan, July 2005, pp. 3-20.

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用於雲端系統之嵌入式硬體開機介面程式的設計與實作

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