A High-Throughput-Rate FFT Processor for OFDM based WPAN/WLAN Applications

適用於以正交分頻多工為基礎無線個人網路與無線區域網路系統之高輸出率快速傅立葉轉換

廖啟翔(Chi-Hsiang Liao)

指導教授 ： 張慶元

國立清華大學/電機資訊學院/電機工程學系/碩士(2010年)

摘要

In nowadays, Fast Fourier Transform (FFT) is widely used in wireless communications applications such as wireless personal area network (WPAN) and wireless local area network (WLAN). WPAN which provides the ultra-high data transmission for short distance is defined by IEEE 802.15.3c Task Group. WLAN based on IEEE 802.11 standard and the standard of IEEE 802.11n improves previous 802.11 standards by adding multiple-input multiple-output (MIMO) technique.
In this thesis, we propose a high-throughput-rate FFT processor that supports WPAN and WLAN applications. The COordinate rotation digital computer (CORDIC) with unrolling simplification and compensation scheme is proposed to lower the hardware cost and power consumption. A multi-data scaling method is adopted to efficiently maintain the same word-length. Moreover, a double-edged triggered constant based multiplier unit is proposed to avoid conflict when supporting WLAN application. The proposed FFT processor is implemented in UMC 90-nm 1P9M process, whose core area is 0.829 mm2 and power consumption is 93.9 mW, 85.95 mW, 67.98 mW and 7.2 mW when performing 512-point FFT, 256-point FFT, 128-point FFT and 4-path 128-point FFT in WPAN and WLAN application, respectively.

關鍵字

快速傅立葉轉換 ； 無線個人網路 ； 無線區域網路 ； 座標軸數位旋轉計算器

並列摘要

現今，快速傅立葉轉換被廣泛使用在無線通訊應用，如無線個人網路(WPAN)和無線區域網路(WLAN)。無線個人網路(WPAN)標準是由IEEE 802.15.3c工作小組制定的，其目標為能短距離提供超高速資料傳輸。無線區域網路(WLAN)建立在 IEEE 802.11標準上，其中IEEE 802.11n藉由支援多重輸入多重輸出技術改善了以往的標準。
在本論文中，提出了一個擁有高輸出率且可同時支援WPAN和WLAN應用之快速傅利葉轉換處理器。一個座標軸數位旋轉計算器(CORDIC)結合展開硬體簡化和補償電路機制被提出以降低面積和功率消耗。另外，一個多資料進位(Multi-data scaling)方法被引用以能夠有效率的維持相同點數。再者，一個以常數乘法為基礎之雙緣觸發乘法單元被提出來避免當操作於WLAN應用時發生的硬體衝突。我們使用UMC 90-nm 1P9M製程實現所提出的處理器，其面積為0.829 mm2，且消耗功率為93.9 mW、85.95 mW、67.98 mW 和 7.2 mW 當分別執行WPAN和WLAN應用下之512點、256點、128點和4條路徑128點之快速傅利葉轉換。

並列關鍵字

FFT ； WPAN ； WLAN ； CORDIC

參考文獻

[1]“Part 15.3: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for High Rate Wireless Personal Area Networks (WPANs),” IEEE Draft P802.15.3c/D08, Mar. 2009.

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[4]Minhyeok Shin and Hanho Lee, “A high-speed four-parallel radix-24 FFT/IFFT processor for UWB applications,” in Proc. IEEE Inter. Symp. on Circuits and Systems, pp. 960-963, May 2008.

[5]Liang Liu, Junyan Ren, Xuejing Wang and Fan Ye, “Design of Low-Power, 1GS/s Throughput FFT Processor for MIMO-OFDM UWB Communication System,” in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), pp. 2594-2597, May 2007.

[6]H.-Y. Lee and I.-C. Park, “Balanced Binary-Tree Decomposition for Area-Efficient Pipelined FFT Processing,” IEEE Trans. on Circuits and Systems, Part-I : Regular Papers, vol. 54, no. 4, pp. 889–900, Apr. 2007.