A Quadrature Sub-harmonic Up-converter with Sideband & Carrier Leakage Calibration

In the thesis, a direct-conversion quadrature sub-harmonic mixer with sideband and carrier leakage calibration is proposed for 2.4 GHz ISM (Industrial, Scientific and Medical) band applications. By adopting quadrature double-balanced structure, low carrier leakage is obtained. To perform up-conversion operation, an octet-phase LO signal is required for this I/Q sub-harmonic mixer, which is generated by 2-stage poly-phase filter. The bias currents of the I/Q paths in the input transconductance stage and switching stage are all digitally controllable so that they can be used for I/Q imbalance and carrier leakage calibration. To minimize sideband level and carrier leakage, the bias currents of each path are decided by a calibration feedback loop. In this loop, there are an RF power detector, a comparator, and a SAR digital controller. The amplitude levels of the sideband and carrier leakage are extracted by the power detector and compared with a reference signal. According to the comparison result, the SAR controller performs the binary searching algorithm to find the best bias current setting. To verify the designed circuits, an experimental chip is fabricated in 0.18-um mixed-mode CMOS technology. The chip area occupies 1.2 mm x 1.3 mm. According to the measurement results, the conversion gain and P1dB of the mixer are -17.5 dB and 11 dBm, respectively. After the mixer is calibrated, the sideband level is reduced to -48.1 dBc. Also the 2xLO leakage drops to -52.1 dBc below the fundamental tone. From an 1.8-V power supply, the quadrature up-conversion mixer totally consumes 40.2 mA current.

關鍵字

次諧波混頻器；直接升頻器；側頻帶；載波遺漏量；校正迴路；多相位濾波器

並列摘要

本論文提出一個運用次諧波混頻技巧所設計的正交直接升頻器，應用於2.4 GHz的工科醫用(ISM)頻帶，並具有側頻帶(sideband)以及載波遺漏量(carrier leakage)校正迴路。本電路採用正交雙平衡架構實現，以達到低載波遺漏量。為進行升頻操作，本正交次諧波混頻器需由雙級多相位濾波器(poly-phase filter)來產生一組八相位的本地震盪器(LO)訊號。在輸入轉導級和切換級中，正交電路的偏壓電流皆可採取數位調整的方式來進行正交不平衡和載波遺漏量的校正。每個路徑的偏壓電流將被回授校正迴路所決定，以確保能將側頻帶與載波遺漏量最小化。在此迴路中包含射頻功率偵測器、比較器以及循序逼近式暫存數位控制器。側頻帶和載波遺漏量的振幅大小先被功率偵測器取出後，再與參考訊號做比較。根據比較結果，循序逼近式暫存器將進行二分搜尋法來尋找最佳的偏壓電流設定。為了驗證本設計電路，一組實驗晶片利用0.18微米混合式訊號CMOS製程來實現。晶片面積共為1.2厘米  1.3厘米。根據量測結果，升頻器的轉換增益以及P1dB各為-17.5 dB和11 dBm。升頻器校正完成後，與輸出訊號主頻率的大小相比，側頻帶訊號降至-48.1dBc，而位於雙倍載波頻率的遺漏訊號則低達-52.1dBc。在1.8V的電源供應之下，此正交升頻器總共消耗了40.2 mA的電流。

並列關鍵字

sub-harmonic mixer ； direct-conversion ； sideband ； carrier Leakage ； calibration loop ； poly-phase filter

參考文獻

[1] H. Y. Tang, “A CMOS Quadrature Sub-Harmonic Up-Mixer with I/Q Calibration, ” NTHU, Oct. 2007.

[2] B. Razavi, “RF transmitter architectures and circuits,” IEEE Custom Integrated Circuits, May. 1999.

[3] Abdellatif Bellaouar, “RF Transmitter Architectures for Integrated Wireless Transceivers,” Microelectronics, pp. 25-30, Nov. 1999.

[6] Simon Haykin, Communication Systems. John Wiley & Sons, Inc, 2001

[7] Marc A. F. Borremans and Michiel S. J. Steyaert, “A 2-V, Low Distortion, 1-GHz CMOS Up-Conversion Mixer,” IEEE J. Solid-State Circuits, vol. 33, pp. 359-366, Mar. 1998.

國際替代計量

A Quadrature Sub-harmonic Up-converter with Sideband & Carrier Leakage Calibration

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