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  • 學位論文

晶圓錯誤樣式辨識的設計與改進

Design And Improvement of Wafer Failure Pattern Recognition

指導教授 : 張智星 張俊盛
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摘要


晶圓在製造過程中難免會有一些缺陷,造成晶圓上的缺陷原因有很多種,因此,工程師透過晶圓針測結果產生的晶圓圖,觀察其錯誤晶粒分佈,進而分析製造過程中錯誤原因。以往總是由工程師以肉眼觀察晶圓圖找出特定的錯誤樣式,雖然人工偵測的方式可保證其正確率,但是卻非常缺乏效率。 本論文的目的即是透過機器學習的技術,讓電腦進行自動錯誤樣式分類,希望能藉此降低人力成本及晶圓分析的錯誤率。傳統方法是以原始晶圓圖上的位置進行資料分類,然而隨著晶圓資料集越來越大,此法可能會降低分類過程的效率。本論文所提出之方法著重於特徵擷取(feature extraction)的創新,我們根據晶圓圖的特性,找出幾何、Radon和其他等三大類的特徵值,大部分的特徵值皆具有旋轉不變(rotation-invariant)、尺度不變(scale-invariant)的特性,透過特徵擷取的方式,以一組特徵向量代表一張晶圓圖,分類器使用支撐向量機(support vector machine)。本論文共定義四種錯誤樣式,並將分類過程分為二個階段,第一階段辨別晶圓圖是否為錯誤樣式(pattern 或none),第二階段則辨別錯誤樣式的晶圓圖為四種特定錯誤樣式中的哪一類。 在實驗分析上,我們比較不同特徵對於系統分類辨識率變化,接著透過降維實驗自306維的特徵資料投影90維,其系統辨識率可高達91.1%。由實驗結果顯示,本論文提出的特徵值組合,對於大型資料集擁有良好的效率及辨識率結果,同時也證實我們提出的方法比起前人更能有效的區分不同晶圓圖的錯誤樣式。

並列摘要


In the process of wafer production, several causes might result in defect regions on a wafer. Defect causes can be identified by analyzing defect patterns on wafer maps obtained from chip probing. In the past, engineers need to manually inspect defect patterns on each wafer map. Although manual inspection guarantees an adequate accuracy for wafer failure pattern recognition, it is an inefficient and tedious task.   The purpose of this research is to perform automatic defect pattern classification through the use of machine learning techniques so that both the cost of human labor and the error rate in manual wafer analysis are reduced. Past method are to classify the data by using the raw wafer map location. However, this method is inefficient when the collected wafer data are large. The proposed method focuses on the innovation in feature extraction. Based on the characteristic of wafer maps, three types of feature are extracted: geometric, Radon and miscellaneous features. Most of feature types preserve the attribute of rotation-invariant and scale-invariant. Each wafer map is then represented by a feature vector. A support vector machine is used as the classifier. In this research, we define four failure patterns and divide the classification process in two stages. In the first stage, the system determines if the wafer map is either one of the four failure patterns or none of them. If the wafer map is determined as one of four failure patterns, the second stage of the system identifies which one of failure patterns the wafer is.   In the experiment, we examine the effectiveness of different features and the feature dimension is projected from 306 to 90 via dimensionality reduction. This yields a failure pattern recognition rate of 91.1%, which proves that the proposed method significantly outperform the previous method. The experimental result shows that the proposed features has satisfactory efficiency and accuracy result in large scale dataset.

參考文獻


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