具有自我對準閘與提昇型源汲電極鍺單電子電晶體之關鍵製程製作

Key Process Modules Design for Ge-Quantum Dot Single-Electron Transistors with Self-aligned Gate in combination with Raised Source/Drain Electrodes

王奕翔(I-Hsiang Wang)

指導教授 ： 李佩雯

國立交通大學/電機學院/電子工程系所/碩士(2020年)

摘要

本論文以選擇性氧化矽鍺奈米柱製作可調控直徑與可定位之鍺量子點的製程為核心基礎，結合預先定義的奈米溝渠與奈米側壁薄膜技術，開發出可與提昇式源/汲極間耦合、可自我定位的鍺量子點整合結構。藉由掃描式電子顯微鏡、穿透式電子顯微鏡以及X射線能量散射光譜等檢查分析，確認本文已實際掌握了在奈米溝渠中精準定位鍺量子點的關鍵製程與結構參數。藉由調整奈米溝渠的寬度、奈米側壁薄膜厚度以及溝渠內矽鍺奈米柱的高度與長度，得以控制氧化所生成之鍺量子點的直徑。以兩道電子束微影曝寫、兩次薄膜沉積與回蝕製程，即可以單一熱氧化步驟形成可自我對準於提昇式源/汲極之鍺量子點結構。因此，不需要精細微影技術與複雜製程，便可以製作具自我對準閘極與提昇式源/汲極的單電子電晶體。本文成功完成直徑15奈米鍺量子點且具自我對準閘極與提昇式源/汲極的單電子電晶體架構。

關鍵字

單電子電晶體 ； 鍺量子點 ； 自我對準

並列摘要

In this thesis, we report the design of key process modules for the nanofabrication of a single, spherical-shaped Germanium (Ge) quantum-dot (QD) that is weakly coupled, self-aligned to raised source/drain (S/D) and top-gate electrodes in a CMOS-compatible, self-organization approach. Based on our previously-developed selective oxidation of a SiGe nano-plug that is filled within the lithographically-patterned poly-Si nanotrench together with nanospacer technology, high-degree of fabrication control in the accurate placement and diameter of the Ge QD is achievable in terms of extensive transmission electron microscope and energy-dispersive X-ray spectroscopy examinations. The diameter of the Ge QD is controllable by adjusting the width of nanotrench, thickness of nanospacer layers, and the height of the poly-SiGe plug. The number and spatial location of the Ge QD within the nanotrench are controllable by the process conditions of nanospacer thickness and thermal oxidation time. Our proposed self-organized structures comprising a single Ge QD self-aligned to raised S/D and Gate electrodes provide an effective building block for the practical fabrication of single-electron transistors at no expense of complicated, stringent lithographical-patterning processes.

並列關鍵字

Single-electron transistor ； Gemanium ； Quantum dot ； Self-aligned

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