Title

延迟锁定环(DLL)及其应用

Translated Titles

Delay-locked Loop and It's Applications

Authors

陆平(Ping Lu);郑增钰(Zeng-Yu Zheng);任俊彦(Jun-Yan Ren)

Key Words

锁相环 ; 延迟锁定环 ; 鉴相器 ; 电荷泵 ; 压控延迟线 ; PLL ; DLL ; phase and frequency detector ; charge pump ; VCDL

PublicationName

固體電子學研究與進展

Volume or Term/Year and Month of Publication

25卷1期(2005 / 02 / 25)

Page #

81 - 88

Content Language

簡體中文

Chinese Abstract

DLL可以产生精确的延迟效果而不受环境和工艺条件的影响,因而常用来生成稳定的延迟或多相位的时钟信号。文中介绍了延迟锁相环的结构,设计了CMOS工艺DLL具体电路,着重分析了新型的伪差分结构延迟单元,它可使设计简单而且单位延迟时间的选择更加灵活。文中还对DLL在高速以太网发送电路中的应用作了具体的设计和仿真,运用DLL使发送数据的上升、下降时间精确地控制在4ns±1ns的范围内。

English Abstract

DLL may generate an accurate delay which is rarely affect ed by circumstance and process condition s, so it is used to generate stable delay or multi-phase clocks. The structure of DLL is introduced and the CMOS circuit of DLL is designed too. The new fake differential delay cell is emphasized because it can simplify the circuit and make it choose delay time more flexibly. The DLL applied to high-speed Ethernet transmitter is designed and simulated by Spice. DLL can control the rise and fall time of data transmitted within 4ns±1ns. The simulation is done with 0.35 micron standard CMOS process technology and 3.3V power supply.

Topic Category 基礎與應用科學 > 物理
工程學 > 電機工程