獨立雙閘極多晶矽奈米線場效電晶體之製作與分析

Fabrication and Characterization of Independent Double-gate Poly-Si Nanowire Transistors

林哲民 ； 黃調元 ； 林鴻志

《國家奈米元件實驗室奈米通訊》 18卷1期 (2011/03) Pp. 2-11

https://doi.org/10.29913/NDLC.201103.0001

摘要

利用自行開發的倒T型和對稱獨立雙閘極兩種多晶矽奈米線薄膜電晶體，我們研究與探索單閘與雙閘操作模式下元件的表現與相關的物理機制。由於使用超薄的奈米線通道，使得通道層電位對控制閘極的電壓呈現高敏感性，元件的次臨界擺幅和臨界電壓可藉獨立雙閘的偏壓有效地調控。當多晶矽奈米線薄膜電晶體操作於單閘控制的模式之下，由於“提早飽和”現象的發生使其驅動電流受到壓抑，此問題可利用雙閘控制模式來加以改善。此外，我們的研究也首次發現，利用雙閘控制可比單閘模式更有效調降位於傳導通道中的位障，可改善在小的汲極偏壓下的輸出電流。

關鍵字

獨立雙閘極 ； 多晶矽奈米線 ； 薄膜電晶體 ； 提早飽和現象 ； 位障

並列摘要

Based on the inverse-T and symmetrical independent double-gated (IDG) polycrystal silicon (Poly-Si) nanowire (NW) thin-film transistor (TFT) developed by our group, we investigate and compare the device characteristics operated under single-and double-gate operation modes. Because of the use of an extra-thin Poly-Si NW channel, the electrical potential in the channel is very sensitive to the bias condition of the two independent gates. Consequently, the threshold voltage (V(subscript TH)) and subthreshold swing (S. S.) of the device operated under a single-gate mode are promptly adjusted by the bias applied to the VTH-control gate. When the device is operated under double-gated mode and with large applied drain voltage bias, its output current can been significantly improved due to the elimination of ”early saturation” effect encountered in the single-gated modes. Finally, under a low applied drain voltage, our analysis points out for the first time that the drain current of a device can also be significantly enhanced with the double-gate mode, thanks to the lowering the barrier of carriers.

並列關鍵字

Independent Doublegated IDG ； Polycrystal Silicon Poly-Si ； Nanowire NW ； Thin-film Transistor ； Early-saturation Effect Barrier