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  • 學位論文

低溫製程高介電係數閘極介電層之金氧半元件特性研究

Characterizations of Metal-Oxide-Semiconductor Devices with High-k Gate Dielectrics Formed by Low Temperature Processes

指導教授 : 胡振國

摘要


近年來,由於顯示器使用之玻璃基板,以及軟性電子之可撓性基板,需要將製程溫度控制在低溫環境下,使得以低溫成長之高品質閘極絕緣層技術受到高度重視。而隨著元件製程技術的持續進步,使用在元件中的閘極介電層厚度也快速降低,造成直接穿隧效應,而產生大量之閘極漏電流及元件關閉時之功率消耗。為了減少閘極漏電流及增加電流驅動能力,使用具有較二氧化矽為高的介電常數的金屬氧化物,如氧化鉿、氧化鋁,被廣為研究討論。此類金屬氧化物在適當之低溫製程之下,可得到優良之電特性及化學穩定性,因此非常適合於先進元件製程技術之應用。 本論文第一部份,首先以室溫陽極氧化技術在半導體基板上先形成超薄二氧化矽絕緣層,之後再將金屬鉿(Hf)在室溫下濺鍍於傾斜晶片上形成金屬薄膜,此傾斜晶片濺鍍法,可在單一晶片上形成不同厚度之薄膜,有助於氧化層之特性分析。之後,再將晶片浸泡於適當濃度的硝酸中,使金屬薄膜氧化成為堆疊式高介電係數金屬氧化層,進ㄧ步再分析氧化層之電特性以及材料特性。 接著,我們提出一方法,可以改善已成長好的高介電係數閘極絕緣層的介面缺陷密度及提升其穩定度。此方法為成長氧化層後再進行後續補償,利用室溫陽極氧化補償方式,將已成長之氧化鋁以及氧化鉿介電層置於純水中,施加以直流疊加交流之電場,而進行陽極氧化修補,再佐以適當之退火製程。可提昇氧化層特性如漏電流、缺陷密度、穩定度等。預期此室溫下後續氧化層補償方法,將可應用在以不同製程成長之氧化層,進行後續補償,以改善絕緣層電特性及提升穩定度。 最後我們提出在室溫濺鍍過程中,對金屬鉿及金屬鋁進行直接氧化(in-situ oxidation),形成堆疊式-氧化鋁/氧化鉿/二氧化矽之量子化結構高介電係數絕緣堆疊層,由於採用高介電係數堆疊氧化層,有別於現今廣泛使用的氮化矽非揮發性堆疊式記憶體,可有效改善記憶體元件操作速度。此堆疊式-氧化鋁/氧化鉿/二氧化矽結構利用氧化鉿中的缺陷(traps)來儲存寫入的電荷,改變元件的臨界電壓,進而達到儲存資料的功效,並可透過反向電壓,直接進行資料讀取,容易進行資料之快速存取。本論文並對此堆疊式氧化層中的電荷是如何進入,以及注入的電荷如何被缺陷所捕捉等物理機制,進行探討。此堆疊式結構及低溫製程方式,可提供未來軟性電子之記憶體元件發展參考。

並列摘要


The requirements of high-quality low temperature processing dielectrics have substantially increased due to the development of display and flexible electronics in these days. The process temperature is required to be low for the electronic devices with glass and flexible substrates. Besides, the next-generation devices technology leads to great reduction in gate dielectrics thickness to achieve high performance. However, the problem of gate leakage currents also accompanies. Alternative materials for gate dielectrics with high dielectric constant, such as HfO2 and Al2O3, have been widely studied to overcome the problem. In addition, alternative insulators for display devices are also required to be fabricated under low temperature. HfO2 and Al2O3 processed under proper processes could possess superior characteristics. Therefore, the methods for high-k dielectrics preparation are of interest. For the preparation of hafnium oxide stacks, SiO2 were first grown as the interfacial layer by room temperature anodization followed by sputtering of Hf metal on a tilt-substrate. The Hf metal with SiO2 interfacial layer was oxidized in nitric acid to form HfO2/SiO2 stacks. The as-prepared high-k dielectric was then passivated by the proposed post anodization compensation method. The compensation process is carried out by putting the prepared HfO2 or Al2O3 in deionized water, and then a DC superimposed with AC electric field is applied across the sample and a Pt cathode. After compensation, samples are annealed at a proper temperature. The high-k dielectrics after receiving post anodization compensation exhibited improved characteristics in dielectric constant, leakage currents, and stress reliability. We suggest that the post anodization compensation method is potentially useful for high-k dielectrics which are prepared by other processes. Finally, a novel structure of Al2O3/HfO2/SiO2 dielectric stack prepared by in-situ oxidation in dc-sputtering technique is proposed for possible flash memory application. The devices exhibit the characteristics of low leakage current of 10-8 A/cm2 at Vg=−2V, high breakdown voltage of −5.4 V and well charge trapping/de-trapping operation. The physical mechanisms of charge trapping and de-trapping in the dielectric stack are also studied. It is proposed that the Al2O3/HfO2/SiO2 dielectric stack prepared by in-situ oxidation is merit for the next generation flash memory application.

參考文獻


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