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  • 學位論文

三階變頻器之脈波寬度調變控制積體電路的設計

Design of Integrated Circuit of Pulse-Width Modulation Control for Three-Level Inverter

指導教授 : 賴炎生
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摘要


本論文的目的為設計一感應馬達三階變頻控制器的特殊應用積體電路,所使用的三階變頻器為具有中性點電壓平衡控制的二極體箝位三階變頻器;以Cell-Based製作流程,採用台積電0.18微米1P6M(TSMC 0.18 μm 1P6M)的製程技術。由於二極體箝位三階變頻器中有直流鏈上下電容電壓不平衡的問題,所以需要控制中性點電壓平衡以減少輸出的電壓與電流諧波。 利用Matlab® / Simulink®進行控制理論模擬與驗證分析,模擬實現部分採用場效可規劃邏輯陣列晶片作為控制核心,負載為三相感應馬達,控制法則使用空間向量調變技術控制變頻器的12組控制訊號,並回授上下電容電壓差,與控制因子補償中性點電壓偏移。再實際利用場效可規劃邏輯陣列進行實驗,結果呈現出控制理論能有夠效的控制中性點電壓平衡以及變頻控制馬達,驗證出其可行性,再利用EDA(Electronic Design Automation)工具及國家晶片系統設計中心(CIC)所提供的Cell Library完成感應馬達三階變頻制器的積體電路設計。

並列摘要


The purpose of this thesis is to design and implement the control technique for the three-level inverter of induction motor by Application Specific Integrated-Circuit in TSMC .18μm technology. The three-level inverter employed is diode-clamped and we have conquered the problem of the voltage of the neutral point in balance. In this thesis a pulse-width modulation technique is presented which provides voltage balance between two DC-link capacitors and reduces the total harmonic distortion of output waveforms. The presented method requires voltage sensor only and can be realized based upon space vector modulation. The simulation results are derived from Matlab®/Simulink®, and the experimental results are derived from an induction motor drive controlled by FPGA. The 12 signals of the inverter are controlled by a mechanism of Space Vector PWM, and feedback the voltage between the 2 capacitors to compensate the bias of the voltage of the neutral point. It will be shown that the simulation results and experimental results agree with other very well and confirming the performance of the presented control technique for three-level inverter. Finally we utilize EDA tools to design a cell-based integrated circuit system fulfilling the goals.

參考文獻


[21] 周逸凱,二極體箝位式三階變頻器的研製,碩士論文,國立台北科技大學機電整合研究所,民國九十五年。
[22] 白昇右,具有中性點電壓平衡之二極體箝位式三階變頻器的研製,產業碩士論文,國立台北科技大學電機系研究所,民國九十六年。
[10] L. M. Tolbert, F. Z. Peng and T. G. Habetler, “Multilevel converters for large electric drives”, IEEE Trans. on Industry Application, Vol. 35, No. 1, pp. 36-44, January/February 1999.
[1] K. R. M. N. Ratnayake, Y. Murai and T. Watanabe, “Novel carrier PWM scheme to control neutral point voltage fluctuation in three-level voltage source inverter”, in Proc. of IEEE PEDS, Vol.2, pp. 663-667, July 1999.
[2] Q. Song, W. Liu, Q. Yu, X. Xie and Z. Wang, “A neutral-point potential balancing algorithm for three-level NPC inverters using analytically injected zero sequence voltage”, in Proc. of IEEE APEC, Vol. 1, pp. 228-233, February 2003.

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