利用模擬研究90 nm節點MOSFETs的RSCE與Vt roll-off控制

Using Simulation to Investigate RSCE and Vt roll-off Controls of 90 nm Node MOSFETs

莊勝竣(Sheng-Jun Zhuang)

指導教授 ： 黃恆盛 ； 陳雙源

國立臺北科技大學/機電學院/機電整合研究所/碩士(2006年)

摘要

由於製程技術不斷的進步，現今金氧半場效電晶體（Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET）的閘極長度（gate length）也不斷的縮小，但縮小之後卻帶來短通道效應（Short-Channel Effect, SCE）及Vt roll-off，其通常的解決方法是採用環型佈植（pocket implant），不過經環型佈植後則會產生反轉短通道效應（Reverse Short-Channel Effect, RSCE）。
本研究使用ISE TCAD模擬金氧半場效電晶體，閘極長度由長變短時，臨界電壓（threshold voltage）值的變化，並試著改變製程中低摻雜汲極（Lightly Doped Drain, LDD）與環型佈植的劑量與能量，記錄臨界電壓值之變化，並定義最小閘極長度之臨界電壓值（Vts）、最大閘極長度之臨界電壓值（Vtl）、臨界電壓值最大峰值（Vtp）時之閘極長度（Lp），做為描述臨界電壓值與閘極長度關係之特徵值，推導經驗公式，做為未來元件工程師的參考。
如此元件工程師在設計金氧半場效電晶體的低摻雜汲極與環型佈植的劑量與能量時，只需將所欲之元件特徵值代入所得之公式中，經解方程式，即能快速的得到所應調整之低摻雜汲極與環型佈植的劑量與能量值。

關鍵字

金氧半場效電晶體 ； 閘極長度 ； 短通道效應 ； 環型佈植 ； 反轉短通道效應 ； 臨界電壓 ； 低摻雜汲極

並列摘要

Due to the nonstop progress of process technology, the gate lengths of modern MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are shrinking continually. However, such progress also brings short channel effect (SCE) and Vt roll-off to the MOSFETs. Pocket implant is thus an unavoidable common practice to control the SCE. However, the implant itself can generate Vt roll-up phenomenon called reverse short-channel effect (RSCE), which also causes another penalty for circuit designers.
In order to control the RSCE, the research utilizes ISE TCAD to simulate the variation of MOSFET threshold voltages for the gate lengths varied from long to short based on different doses and energies of LDD and pocket implants. Four parameters are defined to characterize the obtained RSCEs, and their empirical models are also established in terms of the implant parameters. To further help the device designers in finding the desired implant parameters based on certain RSCE requirement, the methods of solving 4 empirical models are also provided and edited to be a mathematic program. Certainly, all the mathematical models and the solving methods are validated by using UMC provided 90 nm field data and simulation outcome.

並列關鍵字

MOSFET ； gate length ； Short-Channel Effect ； Pocket implant ； Reverse Short-Channel Effect ； Threshold voltage ； Lightly Doped Drain

參考文獻

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