半導體最終測試廠扣留批問題探討及研究

Study and Research the Hold Lots Problem on Semiconductor Final Test Facility

劉世強(John Liu)

指導教授 ： 鄭元杰

元智大學/工程學院/工業工程與管理學系/碩士(2002年)

摘要

半導體最終測試廠扣留批問題探討及研究
學生：劉世強 指導教授：鄭元杰 博士
元智大學工業工程與管理研究所
摘 要
以目前而言，半導體產業已成為臺灣之主流產業。且在由全球代工的趨勢下，半導體產業已在國內發展出自半導體設計，到最後封裝測試，每一層級都非常完整且專業化體系。
然而位於整個半導體產業最下游的最終測試廠(Final Test)，除了面臨其他專業測試同業競爭壓力之外，也因為它位於半導體上層產業的最下游一站，除必須吸收上游產業產能變異之外，亦必須直接面臨顧客交期的壓力，所以相對地其生產線的應變能力必須要更快速以及更加彈性，服務品質也必須更好。
而在專業測試廠(Final Test)中因工程實驗批、測試良率過低以及抽測失敗(QA Gate Fail)所造成測試批必須扣留下來無法出貨，而成為扣留批(Hold Lots)，是最終測試廠生產線上最常發生的問題。也因為扣留批(Hold Lots)必須扣留下來在最終測試廠無法出貨，自然地影響顧客的交期。在過去的學術文獻上一直沒有系統的說明及介紹扣留批的處理方式，以及扣留現象對於最終測試廠所造成的影響，在生產線上，排程人員只能依據主觀的經驗作判斷，或是粗略的評估系統做出決定，這樣往往會造成生產線混亂及顧客訂單無法達成，進而造成公司的損失。本文以說明及研即是針對最終測試廠(Final Test)生產的特性─扣留批(Hold Lot)的問題加究，並針對最終測試廠的扣留批的三個因素：扣留批數量、扣留批解除時間以及解除後所需重測時間，與顧客需求量以及顧客交期建立起數學模式，利用此數學模式來作為扣留批及時反應的依據以及影響程度的判斷法則，以期在扣留情況發生時，生產排程人員有所依據，可以做即時的反應，除減少人為經驗的疏忽，也可以滿足顧客的要求。

關鍵字

最終測試廠 ； 扣留批數學模式 ； 扣留批

並列摘要

半導體最終測試廠扣留批問題探討及研究
Study and Research the Hold Lots Problem on Semiconductor Final Test Facility
研究生:劉世強 Student : John Liu
指導教授 :鄭元杰博士 Advisors : Dr.Yuan-Jye Tseng
Yuan-Ze University
Institute of Industrial Engineering and Management
Abstract
The semiconductor Industry had become the main and important Industry in Taiwan. We had developed one complete system from IC Design to Final Test. The semiconductor Final Test Facility must face the competition of the same business, the input variation of the Assembly Facility and must face the delivery pressure from the customer directly. So, the Final Test Facility must have more and enough ability to deal with emergencies and provides the best service quality.
In Final Test Facility always suffers the hold lots problem due to the experience lots, test low yield and QA Gate fail issues. The tested lots must be held on Final Test Facility and can’t be shipped out. That will impact the customer’s delivery naturally. In the pass study, we can’t find related documents and researchs about the Final Test Facility hold lots problem. In the production line, we just use the experience to deal with it. That just will cause more confusing, troublesome and the loss on both of customer and company.
In this study is directed against the Final Test Facility hold lots problem. To build up the hold lot mathematics model of hold lot quantity, release time, retest time, due date and demand. Use this model, we can analyze the hold lot problem and the impact about the hold lots. And we set up six steps to deal with the hold lots problem. Base on these analysis and these steps, we can do the timely adjustment and feedback to reduce the loss of customer and company.
Keyword：Semiconductor, Assembly Facility, Final Test Facility, Hold lot, Hold Lot Mathematics Model, Hold Lot Quantity, Release Time, Retest Time, Due Date, Demand.

並列關鍵字

Final Test Facility ； Hold Lot Mathematics Model ； Hold lot

參考文獻

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