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  • 學位論文

以牛血清蛋白為閘極介電層的金屬氧化物薄膜電晶體探討

Investigation of metal oxide thin-film transistors with bovine serum albumin as the gate dielectric

指導教授 : 黃振昌 甘炯耀

摘要


本論文主要探討以牛血清蛋白做為金屬氧化物的閘極介電層。在N型非晶氧化銦鎵鋅薄膜電晶體方面,探討了牛血清蛋白的介電特性,先以SiNx為非晶氧化銦鎵鋅薄膜電晶體的閘極介電層,其元件的效能與文獻上能夠相匹配,載子遷移率為12 cm2V-1s-1,臨界電壓為5 V。當相同的元件改以牛血清蛋白做為閘極介電層時,元件在真空環境下量測時得到的效能與以SiNx為閘極介電層時相差無幾,其載子遷移率為5 cm2V-1s-1,臨界電壓為5 V。當在大氣環境下量測時,可以發現元件的操作偏壓大幅下降至3 V,且元件效能會大幅提升,載子遷移率可高達113.5 cm2V-1s-1,而臨界電壓低至0.25 V。其效能提升的原因為牛血清蛋白內之可移動的H3O+與OH-可移動離子會因電場影響形成電雙層,增加電容值並提升電晶體通道內載子的累積能力,使介面的陷阱能態得以被填滿致使載子遷移率上升。 有鑑於N型金屬氧化物薄膜電晶體已被廣泛地研究且已被應用於商用產品中,而P型金屬氧化物在發展金屬氧化物互補式半導體邏輯電路扮演著一個不可或缺的角色,故本論文也探討以反應式磁控濺鍍法沉積各種參數的P型銅氧化物薄膜,並利用各式方法分析其表面型態、成分組成、結晶程度、以及電學性質,企圖尋找最佳的參數以製作P型的銅氧化物薄膜電晶體。 接著以不同的主動層厚度與各種後退火處理製作P型的氧化亞銅薄膜電晶體。當主動層厚度為25 nm,經過在大氣下200℃退火一小時,以SiNx為閘極介電層時的氧化亞銅薄膜電晶體為具有較佳的元件效能的製程條件,最後以牛血清蛋白做為此氧化亞銅薄膜電晶體的閘極介電層,並且改善也提升了元件的效能,其載子遷移率為0.102 cm2V-1s-1,次臨界擺幅為86.5V/decade,實驗結果都顯示了牛血清蛋白可成功地做為N型或是P型金屬氧化物薄膜電晶體的閘極介電層。

並列摘要


Device performance of metal oxide thin-film transistors (TFTs) has been improved by using bovine serum albumin (BSA) as the gate dielectric. BSA, a natural protein with good hydration ability, is composed of acidic and basic amino acid residues of 34% in total. The typical amorphous indium gallium zinc oxide (a-IGZO) TFT with SiNx as the gate dielectric exhibits a field-effect mobility (μFE) value of 12 cm2V-1s-1 and a threshold voltage (VTH) value of 0.25 V, which are comparable to the reported a-IGZO TFTs in the literature. In a relative humidity of 60%, the μFE value of a-IGZO TFT gated with BSA increases considerably to 113.5 cm2V-1s-1 and the VTH value reduces to 0.25 V. The large difference between device gated with SiNx and BSA can be attributed to the formation of electric double layers (EDLs) in hydrated BSA, which exhibits the same behavior as polyelectrolyte. The formation of EDLs contributes to large capacitance of hydrated BSA, which can accumulate higher carrier concentration to improve the performance of the a-IGZO TFTs and the μFE value is therefore increased. To date, n-type a-IGZO TFTs have been applied broadly to serve as the pixel-driving devices in the backplane of active-matrix organic light-emitting diode (AMOLED) displays and the liquid crystal displays (LCD). While p-type oxide TFTs are necessary for realizing the complementary metal oxide semiconductor inverters, it is urgent to develop p-type metal oxide semiconductor materials. We demonstrate good quality p-type copper oxide thin films can be deposited by radio-frequency (RF) magnetron reactive sputtering. The surface morphologies, compositions, crystallinities, and electrical characteristics have been extensively investigated by SEM, AFM, ESCA, XRD, and Hall effect for the purpose of fabricating the p-type copper oxide TFTs. The p-type cuprous oxide TFTs have been fabricated with different active layer thickness and post-annealing conditions. The device performance of p-type cuprous oxide TFTs gated with SiNx has been optimized with active layer thickness of 25 nm followed by annealing at 200℃ for an hour. We finally add an additional BSA layer on top of the device for serving the other gate dielectrics. It can be found that the device performance is improved and the μFE value increases. The p-type cuprous oxide TFT gated with BSA exhibits a μFE value of 0.102 cm2V-1s-1 and a subthreshold swing of 86.5 Vdecade-1.

參考文獻


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