Title

射頻金氧半場效電晶體之模型、特性研究與5.2 GHz低雜訊放大器電路設計

Translated Titles

RF MOSFET Modeling, Characterization and 5.2GHz LNA Circuit Design

Authors

黃建程

Key Words

模型化 ; 低雜訊放大器 ; 射頻 ; LNA ; RF ; modeling

PublicationName

成功大學微電子工程研究所學位論文

Volume or Term/Year and Month of Publication

2003年

Academic Degree Category

碩士

Advisor

蘇炎坤;陳良波

Content Language

英文

Chinese Abstract

本論文主要是射頻金氧半場效電晶體之參數萃取與模型的建立,以及對元件特性在射頻應用上之分析。並將該模型實際應用於電路設計上,以驗該模型之可行性。所有射頻金氧半場效電晶體均採用0.18umCMOS 製程技術。De-embedded 技術首先必須被使用以得到正確的量測結果。為了讓電晶體元件更容易應用在射頻電路設計上,我們需要一個既準確又有權威的射頻金氧半場效電晶體模型。BSIM3 模型被證明能符合此要求,因為它能正確地描述射頻金氧半場效電晶體元件並予以數量化。此外,BSIM4 模型改良了BSIM3 模型的缺點與不足亦能達到此要求。 在論文中,BSIM3 模型和BSIM4 模型分別被驗證於直流與射頻特性,並且兩個模型對量測與模擬的結果均有很不錯的吻合程度。此外,對BSIM3模型和BSIM4 模型的雜訊特性也做了分析與檢驗,其模擬結果也與量測結果大致吻合。最後,設計一個符合IEEE802.11a 規格的5.2GHz 低雜訊放大器以證明所建立的模型之可行性與實用性。並且,對模擬結果做分析與討論。

English Abstract

This thesis focuses on the extraction of MOS transistor modeling for RF integrated circuit design and reveals critical characteristics for RF application. Circuit verification had also done. The devices fabricated by 0.18um CMOS technology must be measured precisely using advanced de-embedding techniques first. To facilitate the device applications in the RFIC design, an accurate and powerful MOSFET model is required. The BSIM3 model is a good candidate, having demonstrated accuracy and scalability in the devices characteristics. Besides, BSIM4, as the extension of BSIM3 model, has some major improvements and additions over BSIM3. Comparison between the BSIM3 model and BIM4 model have been analyzed and discussed. During the procedure of extracting model parameters, the BSIM3 model and BSIM4 model were adopted respectively. The simulation results from DC / RF model show the great agreement with the measured results. Moreover, the noise characteristics of the BSIM3 model and BSIM4 model have been checked and analyzed. Final, a 5.2G low noise amplifier (LNA) conformed IEEE802.11a specification will be designed and the simulation results prove the application of this model for REIC designs. Also, simulated results of LNA is analyzed and discussed.

Topic Category 電機資訊學院 > 微電子工程研究所
工程學 > 電機工程
Reference
  1. [1] P. R. Gray and R. G. Meyer, “Future directions in silicon IC’s for RF personal communications,” Proc. IEEE Custom Integrated Circuits Conference, pp.83-90, May 1995.
    連結:
  2. [2] M. Jamal Deen and Tor A. Fjeldly, “CMOS RF modeling, characterization and applications,” World Scientific, 2002.
    連結:
  3. [3] L. E. Larson, “Integrated circuit technology options for RF IC’s – present status and future directions,” IEEE J. Solid - State Circuits, vol. 33, pp. 387-399, March 1998.
    連結:
  4. [4] C. Wann, F. Assaderaghi, L. Shi, K. Chan, S. Cohen, H. Hovel, K. Jenkins, Y. Lee, D. Sadana, R. Viswanathan, S. Wind, Y. Taur, “High-performance 0.07-um CMOS with 9.5-ps Gate Delay and 150GHz fT,” IEEE Electron Device letters, vol. 18, pp.625-627, 1997.
    連結:
  5. [5] Y. Cheng et al., “A Physical and scalable BSIM3v3 I-V model for analog/digital circuit simulation,” IEEE Trans. Electron Device, vol. 44, pp. 277-287, Feb. 1997.
    連結:
  6. [8] Christian C. Enz and Y. Chang, “MOS transistor modeling for RF IC design,” IEEE Journal of Solid-State Circuits, vol. 35, Feb 2000.
    連結:
  7. [10] Y. Chang, C. H. Chen, C. Enz, M. Matloubian, “MOSFET modeling for RF circuit design,” Proceedings of the Second IEEE International Caracas on Devices, Circuits and Systems, pp. D23-1 to D23-8, 2000.
    連結:
  8. [12] Daniel P. Foty, “MOSFET modeling with SPICE principles and practice,” Prentice Hall, 1997.
    連結:
  9. [16] K. Cao et al., “Modeling of pocket implanted MOSFETs, and anomalous analog behavior,” Proc. IEEE International Electron Device Meeting,1999.
    連結:
  10. [17] Hanjin Cho and Dorothea E. Burk, “A three-Step method for the de-embedding of high-frequency S-parameter measurements,” IEEE Trans. Electron Device, Vol. 38, no. 6,pp. 1371-1384, 1991.
    連結:
  11. [18] D. R. Pehlke, M. Schroter, A. Burstein, M. Matloubian and M. F. Chang,“High-frequency application of MOS compact models and their development for scalable RF MOS Libraries,” Proc. IEEE Custom Integrated Circuits Conference, pp. 219-222, May 1998.
    連結:
  12. [20] Y. Cheng and M. Matloubian, “High frequency characteristics of gate resistance in RF MOSFETs,” IEEE Electron Device Letters, vol. 22, no. 2, pp. 98-100, 2001.
    連結:
  13. [21] W. Liu and M. C. Chang, “Transistor transient studies including transcapacitive current and distributive gate resistance for inverter circuits,” IEEE Trans. On Circuits and Systems I: Fundamental Theory and Applications, vol. 45, pp.416-422, 1999.
    連結:
  14. [23] W. Liu, R. Gharpurey, M. C. Chang, U. Erdongan, R. Aggarwal and J. P. Mattia, “R.F. MOSFET modeling accounting for distributed substrate and channel resistances with emphasis on the BSIM3v3 SPICE model,”Technical Digest of international Electron Devices Meeting, pp309-312,1997.
    連結:
  15. [24] Brian A. Floyd, Jesal Mehta, Carlos Gamero, and Kenneth K. O, “A 900-MHz, 0.8-µm CMOS low noise amplifier with 1.2-dB noise figure”, IEEE Custom Integrated Circuit Conference, pp.661-664, 1999.
    連結:
  16. [6] J. –J. Ou, X. Jin, I. Ma, C. Hu and P.Gray, “CMOS RF Modeling for GHz Communication IC’s,” Prof. of the VLSI Symposium on Technology, June 1998.
  17. [7] MOS9 manual, http://www.semiconductors.philips.com/philips_models.
  18. [9] Weidong Liu, Xiaodong Jin, Jeff Ou, M. Chan and Chenming Hu,“BSIM4.2.1 MOSFET Model – User’s Manual,” University of California at Berkeley, 2001.
  19. [11] Thomas H. Lee, “The design of CMOS radio-frequency integrated circuits,” Cambridge, 1998.
  20. [13] Thomas Gneiting, “Modeling and simulation of deep submicron MOS Transistors using the BSIM3v3 model,” Advanced Modeling Solution, pp. 3-14, July 1997.
  21. [14] J. H. Huang, Z. H. Liu, M. C. Jeng, K. Hui, M. Chan, P. K. Ko and Chenming Hu, “BSIM3v3.2.2 MOSFET Model – User’s Manual,”University of California at Berkeley, 1999.
  22. [15] Willian Liu, “MOSFET models for SPICE simulation, including BSIM3 and BSIM4,” John Willey & Sons, pp.399-413, 2001.
  23. [19] C. Enz and Y. Cheng, “MOS transistor modeling for RF IC design,”IEEE Journal of Solid-State and Integrated Circuit Technology, pp.186-201, 2000.
  24. [22] X. Jin, J. Ou, C. Chen, W. Liu, P. Gray and C. Hu, “An effective gate resistance model for CMOS RF and noise modeling,” IEEE International Electron Device Meeting, pp. 961-964, 1998.
Times Cited
  1. 吳孟權(2010)。MOSFET經HC應力後對PSP與BSIM4模型參數影響的分析。臺北科技大學機電整合研究所學位論文。2010。1-96。