鄰近同心金屬-絕緣層-半導體穿隧二極體耦合效應及開路電壓感測之應用

Coupling Phenomenon between Adjacent Concentric Metal-Insulator-Semiconductor Tunnel Diodes and Its Application of Coupled Open-Circuit Voltage Sensing

陳人豪(Jen-Hao Chen)

指導教授 ： 胡振國

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2021年)

https://doi.org/10.6342/NTU202101334

摘要

本篇論文主要探討兩個相鄰的同心金氧半穿隧二極體之電荷耦合效應及其反應出的開路感測電壓現象，並利用開路感測電壓低功耗的優勢建立出在記憶體及邏輯計算元件上的應用。在本論文的第二章，我們透過對此兩相鄰之金氧半穿隧二極體做電流-電壓量測得出內部圓形元件會因為與來自外部圓環的少數載子流發生耦合現象而有飽和電流增加的效應。除此之外，進一步比較厚度對此現象的影響後，我們得出具有較薄氧化層之元件在耦合表現上有增益的效果。建立在此利用薄氧化層所造成的耦合機制，我們在本論文的第三章中提出利用此兩金氧半結構之開路電壓感測效應所達成的記憶體應用。此記憶體之窗口受到氧化層厚度、寫入時間以及不同運作模式所影響。為了印證在上述兩個章節中的實驗數據及其機制，我們也利用 SILVACO TCAD 軟體針對金氧半穿隧二極體之邊際電場及兩穿隧二極體之間的開路電壓感測進行模擬，發現此兩物理現象與厚度及氧化物陷阱電荷之間的趨勢均與實驗結果和我們所提出的機制相吻合。最後，我們透過將外圍環型金氧半結構切割成數個分離的元件之方式，將整個元件發展成一個多階開路電壓感測器，並進一步提出一個將其設計成能夠承載多輸入端且具低功耗特性之邏輯元件的想法，此有望解決傳統 CMOS 邏輯元件所遇到的困難。

關鍵字

金氧半穿隧二極體 ； 電荷耦合 ； 開路電壓 ； 少數載子流 ； 邊際電場 ； 記憶體 ； 邏輯元件

並列摘要

In this thesis, the coupling phenomenon between two adjacent concentric MIS tunneling diodes and the related application of open-circuit voltage sensing phenomenon on memory device and logic gates were investigated. In chapter 2, by measuring the current-voltage characteristics of these two concentric MIS tunneling diodes, the saturation current increment of inner center MIS TD due to additional minority carrier supply from open-gated outer ring was found. Apart from this, an enhancement of coupling efficiency with thinner oxide was also observed. Based on this result, we proposed a memory application utilizing the open-circuit voltage sensing, whose window depends on write time, oxide thickness, and operation mode. Moreover, SILVACO TCAD simulation was implemented to confirm the experimental result and mechanism proposed in chapters 2 and 3 as well. It was found that the tendency between the physical phenomena observed, oxide thickness and trapped electrons in oxide is consistent with the experimental result. Finally, by segregating the outer ring MIS TD into several ring-shaped sector MIS TDs, a multi-level sensor was accomplished. Furthermore, a novel concept enabling this device to become a logic gates accommodating multiple inputs with low power consumption was put forward, which was believed to overcome the problem encountered by conventional CMOS logic device.

並列關鍵字

MIS tunneling diode ； Coupling phenomenon ； Open-circuit voltage ； Minority carriers supply ； Fringing field ； Memory ； Logic device

參考文獻

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