應用於物聯網之低功率低面積甦醒接收機

An Ultra-low-power Low-area Wake-up Receiver for IoT Applications

袁祥程(Hsiang-Cheng Yuan)

指導教授 ： 林宗賢

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2021年)

https://doi.org/10.6342/NTU202101082

摘要

隨著先進技術的發展，用於無線通信的智能傳感測器已成為物聯網應用中的關鍵組成部分。部署在環境中的大量感測節點使得更換電池變得難以執行。對於低吞吐量的應用，利用喚醒接收器(wake-up receiver)在需要時喚醒主收發器是個有效的方法。因此，高性能和高功率的主收發器可以在大多數時間保持睡眠模式以節省功率，而使用能量檢測(energy detection)實現的喚醒接收器是此類低功耗操作的最佳選擇。
本文提出了一種基於能量檢測的喚醒接收機的設計，並採用台積電90奈米CMOS技術製造。在RF前端皆為被動電路的情況下，所有電路均以基帶頻率工作，因此在0.5 V電源電壓下的總功耗為3.6 nW。透過使用開關電容器積分器(switched-capacitor integrator)代替交流耦合電阻和電容進行偏移補償來減小面積，而晶片面積為0.84 mm2。該接收器以427.8-MHz ISM頻段和100 b/s的數據速率運行，靈敏度為75.3 dBm 時延遲為110毫秒，適合短距離IoT應用。

關鍵字

低功率接收機 ； 甦醒接收機 ； 直接能量檢測接收機 ； 偏移校正機制

並列摘要

Smart sensors for wireless communication is a key building block in IoT applications. A large number of sensor nodes deployed in the environment makes battery replacement impracticable. Utilizing wake-up receiver to wake up the main transceiver when required is an efficient way for low-throughput applications. Thus, the high-performance and high-power main transceiver can maintain at sleeping mode most of the time to save power. Wake-up receivers realized using energy-detection are the best choice for such low-power operations.
This thesis presents the design of a wake-up receiver based on energy detection. The proposed chip is fabricated in TSMC 90-nm CMOS technology. With a passive front end, all the circuits are operating at baseband frequency, leading to a total power consumption of 3.6 nW under a 0.5-V supply voltage. The chip occupies 0.84-mm2 area, which is reduced by using switched-capacitor integrator instead of ac-coupling resistors and capacitors for offset compensation. Operating at 427.8-MHz ISM-band and 100-b/s data rate, the receiver has a sensitivity of −75.3 dBm with a 110-ms latency, which is suitable for short-range IoT applications.

並列關鍵字

Low-power receiver ； Wake-up radio ； Direct energy-detection receiver ； Offset compensation

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