DOI
stands for Digital Object Identifier
（
D
igital
O
bject
I
dentifier
）
,
and is the unique identifier for objects on the internet. It can be used to create persistent link and to cite articles.
Using DOI as a persistent link
To create a persistent link, add「http://dx.doi.org/」
「
http://dx.doi.org/
」
before a DOI.
For instance, if the DOI of an article is
10.5297/ser.1201.002
, you can link persistently to the article by entering the following link in your browser:
http://dx.doi.org/
10.5297/ser.1201.002
。
The DOI link will always direct you to the most updated article page no matter how the publisher changes the document's position, avoiding errors when engaging in important research.
Cite a document with DOI
When citing references, you should also cite the DOI if the article has one. If your citation guideline does not include DOIs, you may cite the DOI link.
DOIs allow accurate citations, improve academic contents connections, and allow users to gain better experience across different platforms. Currently, there are more than 70 million DOIs registered for academic contents. If you want to understand more about DOI, please visit airiti DOI Registration （ doi.airiti.com ） 。
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A Method of Correcting the Shift Error of Multilevel Flash Memory by the Skill of Gray Code
林宏明 , Masters Advisor：黃德成
繁體中文
DOI：
10.6845/NCHU.2007.00749
格雷碼 ； 快閃記憶體 ； multilevel flash ； gray coding ； shift level
- [3] K. Itoh, “VLSI Memory Chip Design,” Springer pp. 46-47, 2001.
連結：
- [6] C. Calligaro, A. Manstretta, A. Pierin and G Torelli,“Comparative Analysis of Sensing Schemes for Multilevel Non-Volatile Memories,” Proc. IEEE Int. Conf. on Innovative System in Silicon, pp. 266-273, Oct. 1997.
連結： - [7] T. S. Jung, Y. J. Choi, K. D. Suh, “A 3.3V 128Mb Multi-Level NAND Flash Memory for Mass Storage Applications,” Solid-State Circuits Conference, Digest of Technical Papers. 43rd IEEE ISSCC96, 1996.
連結： - [8] H. Nobukata, S. Takagi, K. Hiraga, “A 144-Mb, Eight-Level NAND Flash Memory with Optimized Pulsewidth Programming,” IEEE Journal of Solid-State Circuit, Vol. 35, no. 5, pp. 682-690, May. 2000.
連結： - [10] H. Kurata, N. Kobayashi, K. Kimura, “A Selective Verify Scheme for Achieving a 5-MB/s Program Rate in 3-bit/cell Flash Memories,” Symposium on VLSI Circuits Digest of Technical Papers, pp. 166-167, Jun. 2000.
連結：
