DOI
stands for Digital Object Identifier
(
D
igital
O
bject
I
dentifier
)
,
and is the unique identifier for objects on the internet. It can be used to create persistent link and to cite articles.
Using DOI as a persistent link
To create a persistent link, add「http://dx.doi.org/」
「
http://dx.doi.org/
」
before a DOI.
For instance, if the DOI of an article is
10.5297/ser.1201.002
, you can link persistently to the article by entering the following link in your browser:
http://dx.doi.org/
10.5297/ser.1201.002
。
The DOI link will always direct you to the most updated article page no matter how the publisher changes the document's position, avoiding errors when engaging in important research.
Cite a document with DOI
When citing references, you should also cite the DOI if the article has one. If your citation guideline does not include DOIs, you may cite the DOI link.
DOIs allow accurate citations, improve academic contents connections, and allow users to gain better experience across different platforms. Currently, there are more than 70 million DOIs registered for academic contents. If you want to understand more about DOI, please visit airiti DOI Registration ( doi.airiti.com ) 。
A Novel Copper Electroplating Formula for Filling Through Silicon Vias
陳偉翔 , Masters Advisor:竇維平
繁體中文
電鍍 ; 矽通孔 ; 銅導線 ; 沉積銅 ; 三維晶片堆疊 ; eletroplating ; through silicon vias ; copper deposition ; 3D chip stacking ; interconection


- 1.Prentice-Hall, “Introduction of semiconductor Manufacturing Technology”, p.447, New Jersey, 2001.
連結: - 4.K. Kondo, T. Nakamura, D. Mikami, T. Ookubo “Via Filling Electrodeposition by Using Periodical-Reverse Pulse Current”, Journal of The Electrochemical Society., 6, 135, 2007.
連結: - 5.J. J. Sun, K. Kondo, T, Okamura, S. Oh, M. Tomisaka, H, Yonemura, M. Hoshion, and K. Takahashi, “High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking,” Journal of The Electrochemical Society., 150, 355, 2003.
連結: - 6.K. Kondo, T. Yonezawa, D. Mikami, T. Okubo, Y. Taguchi, K. Takahashi, and D. P. Barkey,“High-Aspect-Ratio Copper-Via-Filling for Three-Dimensional Chip Stacking”, Journal of The Electrochemical Society., 152, H173, 2000.
連結: - 7.L. Xu, P. Dixit, J. miaro, J. H. L. Pang, X. Zhang, K. H. Tu, and R. Preisser “Through-wafer electroplated copper interconnect with ultrafine grains and high density of nanotwins”, Applied Physics Letters., 90, 03311, 2007.
連結: