多階直流-交流功率轉換器架構與脈波寬度調變技術之發展

Development of Topology and Pulse-Width Modulation Techniques for Multilevel (DC-AC Converters) Inverters

徐福三(Fu-San Shyu)

指導教授 ： 賴炎生 教授

國立臺北科技大學/機電學院/機電科技研究所/博士(2005年)

https://doi.org/10.6841/NTUT.2005.00078

摘要

多階直流-交流功率轉換器業已廣泛用於驅動中壓變頻器等高功率負載，本論文旨在探討其架構與脈波寬度調變技術。眾所皆知，多階架構將輸出容量分散於多組功率半導體開關元件，可降低單一開關元件承受功率與元件成本；而串接橋式架構，更兼具模組化與分散切換頻率等優點，由脈波寬度調變技術達成弦波型式輸出電壓，可同時降低元件切換頻率與切換損失。
本論文提出新型的混合橋式多階直流-交流功率轉換器架構，於相同硬體層數具有最高輸出電壓階數。此外，本論文簡介周波變換器架構、電流源變頻器架構、二極體箝位式架構、飛輪電容式架構、串接橋式架構、混合橋式架構與類線性架構，並與本論文提出之新型架構比較，以驗證新型架構之優點。
其次，本論文提出新型的脈波寬度調變技術，用於控制多階直流-交流功率轉換器之輸出電壓。相較於既有之步階調變與選擇諧波消除調變，本論文提出之脈波寬度調變技術不受限於實際硬體層數，可提升諧波消除能力且不浪費切換次數，並具有最佳之總諧波失真；以1/4週期切換次數為9之七階輸出電壓為例，可消除29次以下之諧波，總諧波失真最低可達0.21%。
本論文以自行研製之實驗系統，驗證所提出之架構與脈波寬度調變技術；由數位信號處理器控制三相電動機驅動器，每相於三層全橋串聯下，輸出電壓階數可達27階。以實驗結果驗證實驗系統之正確性，並驗證本論文提出之新型架構與新型脈波寬度調變技術。

關鍵字

Multilevel inverter ； PWM.

並列摘要

The objective of this dissertation is to investigate the topology and Pulse-Width Modulation (PWM) techniques for multilevel inverters, which have been widely applied to medium voltage control of drives. It is well-known that the topology of multilevel inverters provides some advantages, including reduction of cost using low power devices for high power inverter and modulization of switching cells. The PWM technique controls the inverter to give sinusoidal output voltage ideally while reducing the switching frequency.
This dissertation presents a new hybrid topology multilevel inverter which gives the maximum level number of voltage for the same number of hardware stages. For comparison, several topologies are briefly introduced; these topologies include current source inverter, cycloconverter, diode clamp topology, flying capacitor topology, cascade topology, hybrid topology, and quasi linear topology. The comparison results confirm the claim for the presented hybrid topology.
Moreover, a novel PWM technique is presented to cope with the voltage control for multilevel inverter. As compared with well-known PWM techniques, step modulation and selective harmonic elimination techniques, the presented PWM technique removes the limitation related to the physic number of inverter stages to give the best total harmonic distortion results among them. For example, when the number of commutations per quarter is 9 and the level is 7, the first un-eliminated low order harmonic appears at the 29th harmonic and the minimum value of THD is 0.21%.
A multilevel inverter is implemented to confirm the presented topology and PWM technique. Each phase has three full-bridge cells connected in series. The implemented multilevel inverter is controlled by a digital signal processor to give the voltage levels up to 27 for three-phase motor drives applications. Experimental results fully confirm that the hardware design, and developments of topology and PWM technique.

並列關鍵字

多階直流-交流功率轉換器 ； 脈波寬度調變技術

參考文獻

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