先進互補式金氧半場效電晶體其閘極氧化層可靠度之探討

黃信惇

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先進互補式金氧半場效電晶體其閘極氧化層可靠度之探討

Gate oxide reliability of advance CMOS device

黃信惇 , Masters　　Advisor：陳志方　　

英文

崩潰；可靠度； reliability ； breakdown

Abstract │ Reference (25) │ Altmetrics

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In this thesis, the sample is an 8inch wafer for 0.15μm technology n-MOSFET’s and p-MOSFET’s and we researched on oxide reliability. As devices scaling down, the device operational voltage and some characteristic still decreases slowly. The area and the thickness of the device oxide layer also decreased that varied the characteristic representation. So the dielectric oxide layer in MOSFET is to pay much attention to people. My experiment focuses on the difference between thin and thick oxide layer and finds the difference of the characteristic between before breakdown and after breakdown.
  First, I use ramp voltage test and constant voltage test to confer the difference of the I-V changes. Then I use the past breakdown definition to analyze the I-V curve. I want to find what influence on device between thin and thick oxide layer. Besides, I try to generalize it has the more accurate way to define the device breakdown.
In these experiments, we used ICS (Interactive Characterization Software) to control HP4155B (Semiconductor Parameter Analyzer) produced by Agilent Technologies and 4200-SCS system produced by Keithley to finish various researches.

Reference ( 25 ) 〈TOP〉

[1] Maes, H.E.; Degraeve, R.; Nigam, T.; De Blauwe, J.; Groeseneken, G.; “Reliability of ultra-thin dielectrics for giga scale silicon technologies” Optoelectronic and Microelectronic Materials Devices, 1998. Proceedings. 1998 Conference on , 1999 ,Page(s): 7 -14
連結：
[2] Kundu, S.; Sengupta, S.; Galivanche, R.; “Test challenges in nanometer technologies” European Test Workshop, 2000. Proceedings. IEEE , 2000 Page(s): 83 -90
連結：
[3] Oussalah, S.; Nebel, F.; “On the oxide thickness dependence of the time-dependent-dielectric-breakdown” Electron Devices Meeting, 1999. Proceedings., 1999 IEEE Hong Kong , 1999 Page(s): 42 -45
連結：
[4] Momose, H.S.; Ohguro, T.; Nakamura, S.; Toyoshima, Y.; Ishiuchi, H.; Iwai, H.; “Study of wafer orientation dependence on performance and reliability of CMOS with direct-tunneling gate oxide” VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on , 2001 Page(s): 77 -78
連結：
[6] Takayanagi, M.; Takagi, S.; Toyoshima, Y.; “Gate voltage dependent model for TDDB lifetime prediction under direct tunneling regime” VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on , 2001 Page(s): 99 -100
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