漸進接面對於高壓金氧半電晶體性能與可靠度之影響

艾登仁

doi:10.6844/NCKU.2015.01542

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漸進接面對於高壓金氧半電晶體性能與可靠度之影響

Effect of Gradual Junction on Performance and Reliability of High Voltage MOS Transistors

艾登仁 , Masters　　Advisor：陳志方　　

英文 DOI： 10.6844/NCKU.2015.01542

高壓金氧半場效電晶體；漸進接面；熱載子導致之退化；電腦輔助設計模擬； HVMOSFET ； gradual junction ； off-state breakdown ； hot-carrier-induced degradation ； TCAD simulation

Abstract │ Reference (54) │ Altmetrics

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In the thesis, special process manufactured high voltage metal-oxide-semiconductor field effect transistors (HV-MOSFET) with gradual junction was studied. Devices’ breakdown voltage, hot-carrier-induced degradation and lifetime were compared with high-voltage devices with traditional junction. The different mechanism and device lifetime between the devices was investigated.
  First, the advantages and the usage of HVMOSFET were illustrated. The motivation of further studying high-voltage device with gradual junction was presented. Due to the fact that high voltage devices with gradual junction had better off-state breakdown voltage performance comparing with device with traditional junction. Thus, the mechanism of devices’ off-state breakdown, relationship between hot carrier effect and device reliability and lifetime were performed in the thesis. Also, technology computer aid design (TCAD) was utilized to discuss the details of the devices.
  Therefore, the differential between high-voltage devices with traditional junction and gradual junction were presented in the second part of the thesis, and the structure of the devices and the measurement methodology and setup were also described. Including device current ID-VD, linear region current ID-VG, substrate current Isub-VG and off-state breakdown voltage VBD.
  The main part of the thesis were focus in part three and part four. In part three, the observation of improvement of off-state breakdown voltage in devices with gradual junction was proved. And also indicated that the improvement of off-state breakdown voltage was even better in bigger dimension devices with gradual junction. As a result, TCAD was used to analysis the mechanism between these two kinds of devices, for instance, the electric field contour, impact ionization rate contour. 
  The reliability issue was discussed in part four, which the hot carrier stress was applied to study the degradation of the devices. The measurement setup and stress condition were presented. TCAD simulation software was used to confirm the measurement data. At the end, the plot of devices’ lifetime versus substrate current was demonstrated. It can be used to predict the lifetime of high-voltage devices’ lifetime if the structure is demanded in application.

Reference ( 54 ) 〈TOP〉

[1] Li, Y. Q., C. A. T. Salama, M. Seufert, P. Schvan, and Mike King (1997), “Design and Characterization of Submicron BiCMOS Compatible High-Voltage NMOS and PMOS Devices,” IEEE Transactions on Electron Devices, 44(2), pp. 331~338
連結：
[2] B. S. Doyle, Member, IEEE, and K. R. Mistry, Member, IEEE "Anomalous Hot-Carrier Behavior for LDD p-Channel Transistors " IEEE Electron Device Letters VOL.14 No.11 November, 1993
連結：
[4] Zitouni, M., F. Morancho, H. Tranduc, P. Rossel, J. Buxo, I. PageÁs, and S. Merchant (1999), “A new lateral power MOSFET for smart power ICs: the ``LUDMOS concept'”, Microelectronics Journal , 30(6), pp. 551~561
連結：
[6] Mikoshiba, H., T Horiuchi, and K. Hamano (1986), “Comparison of Drai Structures in n-Channel MOSFET’s,” IEEE Transactions on Electron Devices, vol.ED-33, no. 1, 1986, pp.140~144
連結：
[7] Ogura, S., P. J. Tsang, W.W. Walker, D.L. Critchlow, and J.F. Shepard (1981), “Elimination of hot electron gate current by the lightly doped drain-source structure,” IEEE Electron Devices Meeting, International, 27, pp. 651~654
連結：

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