高電壓金氧半場效電晶體其特性與可靠度探討

劉育銘

doi:10.6844/NCKU.2015.01543

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高電壓金氧半場效電晶體其特性與可靠度探討

Investigation of Device Characteristics and Reliability on High Voltage MOSFET

劉育銘 , Masters　　Advisor：陳志方　　

英文 DOI： 10.6844/NCKU.2015.01543

高壓金氧半場效電晶體；元件尺寸；熱載子導致之退化；閉態崩潰電壓； HVMOSFET ； device dimension ； hot-carrier-induced degradation ； off-state breakdown

Abstract │ Reference (40) │ Altmetrics

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In the thesis, hot-carrier-induced degradation and mechanism as well as the gate oxide integrity issue of high voltage metal-oxide–semiconductor field- effect transistors (HVMOS) with different layout parameters were investigated.
There were three kinds of parameter used in this thesis: Lgs (source-to-gate-edge), Lg (gate-length), and Lgd (drain-to-gate-edge).
	First, the advantages and applications of HVMOS transistors were illustrated. Moreover, the basic theories of the punch-through breakdown, the junction breakdown, the gate-induced-drain-leakage (GIDL), and the hot carrier effect were also introduced. 
	The measurement setup device and the structure of our study were introduced. The measurement results of I-V characteristics including ID-VG & ID-VD was presented.
	In the main part of content, the influence of varying the layout parameter on off-state breakdown was studied at first. By measurement and Technology on Computer Aided Design (TCAD), it could be observed that there were two different mechanisms dominating the breakdown before and after Lg is varied. The Lgs has a small influence on breakdown voltage. What’s more, shrinking Lgd under a certain limit would not worsen the off-state breakdown voltage.
	After screening out the devices with qualified breakdown voltage, the hot carrier reliability of these devices were investigated. From the experiment results, the hot carrier reliability was deteriorated no matter which dimension parameter shrank. Besides, the hot carrier degradation mechanism and damaged position were also the same. The TCAD simulation indicated that impact ionization rate near Si/SiO2 had small difference in these devices. At last, according to the experiment results, shortening which parameter is the most effective way to increase the performance without affecting the hot carrier reliability too much.

Reference ( 40 ) 〈TOP〉

[4] Vaidyanathan Subramanian (2009) ,High Voltage MOSFET Technology, Models, and Applications, IBM
連結：
[5] Shrivastava, M., Jain, R., Baghini, M.S., Gossner, H., and Ramgopal Rao, V. (2010), “A Solution Toward the OFF-State Degradation in Drain-Extended MOS Device”,IEEE Transactions on Electron Devices, 57(2), pp. 448-457
連結：
[6] VanDerVoom, P., Gan, D., and Krusius, J.P. (2000),“CMOS shallow-trench-isolation to 50-nm channel widths”,IEEE Transactions on Electron Devices, 47(6), pp.1175 –1182
連結：
[7] Yamaguchi, Y, Iwamatsu, T., Joachim, H.-O., Oda, H., Inoue, Y., Nishimura, T., and Tsukamoto, K. (1994), “Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET's using a gate-overlapped LDD structure”,IEEE Transactions on Electron Devices, 41(7), pp.1222-1226
連結：
[8] P. De., and P. K. Chakraborty (2004), “Effect of punch through on the microwave series resistance of n + np + Si IMPATT diodes around the X band”, Japanese Journal of Applied Physics (JJAP), 19(7), pp.859-863
連結：

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