- 學位論文
TLC NAND型快閃記憶體錯誤型態及特性
Error Patterns and Error Characterization for TLC NAND Flash Memory
摘要
近年來，NAND型的快閃記憶體被廣泛使用在許多的儲存媒體中。 大多數的製造商為了降低成本並且在每個單位(Cell)中儲存更多位元(Bit)，都極力將快閃記憶體的體積縮小。 然而當體積縮小時，在每個浮閘極(Floating-gate)中的電子就容易產生單位與單位之間彼此干擾的問題 (Cell-to-Cell Interference)，因此資料儲存的可靠度就衍生為關鍵問題。 此外，快閃記憶體的單位也會隨著時間而洩漏電壓並且影響到資料的可靠度。 在這篇論文中，我們透過實驗儀器去檢測東芝(Toshiba) 19奈米製程的TLC NAND型快閃記憶體並且觀察不同的錯誤型態。 此外，我們利用觀察到不同電壓的分佈計算Mutual Information (MI)並找出最佳化的臨界電(Threshold voltage)。
關鍵字
無資料並列摘要
In recent years, Negated AND (NAND) flash memory has been widely used as a medium for many storage systems, such as Solid State Drives (SSD). Most of NAND flash memory manufacturers scale down the manufacture process and stored more bits in each cell to lower cost. However, the reliability of stored data has become a critical issue since the scaled feature size lowers the number of electrons at each floating-gate while increases the Cell-to- Cell Interference (CCI). Besides, flash cell leaking charge over time also affects the reliability of the NAND flash memory. Therefore, we need more powerful Error Correcting Code (ECC) to promotion reliability such as Low-Density Parity Check (LDPC) codes. In this work, we develop an experimental instrument for Toshiba 19nm Triple Level Cell (TLC) NAND flash memory and observe the error characteristic in different simulation environment. In order to observe different amounts error characterization, we attempt to put different amounts of pilot into one page and collect these pilot results to calculate mean, variance and standard deviation. The threshold voltage will be changed when error characterization was happening in flash memory. We investigate the threshold voltage optimization by calculating the Mutual Information (MI) in Non-Gaussian distribution. The values of the threshold voltage are optimized by Maximizing Mutual Information (MMI) between two inputs and four outputs of the three reads per cell under different situation.