- 學位論文
二維材料電阻式記憶體與1T1R結構之研究
The research of 2D material-based Resistive Random Access Memory and 1T-1R cell
摘要
隨著AI與IoT日漸普及，存儲裝置的需求也與日俱增，然目前傳統存儲裝置並無法應付這樣的的需求，例如快閃記憶體苦於耐用度不足，而快取記憶體雖有足夠的存取速度但容量太小等。因此，新型態記憶體的需求因應而生，目前最受矚目的一群稱為SCM (Storage Class Memory, 儲存級記憶體)，其特色是不俗的存取速度與較以往快取記憶體更大的容量，而電阻式記憶體(RRAM)便是其中一員。和傳統記憶體相比，RRAM的優點有記憶密度大(NOR FLASH的2-4倍)、高操作速度(~140MB/秒)與更好的耐用度(>106次)等。 RRAM一般常用的材料主要為TMO (Transitional Metal Oxides, 過度金屬氧化物)，並以此組成MIM(金屬-半導體-金屬)的三明治結構，並確立了RRAM的特性指標，以此為根基，學者們開始找尋替換新材料的可能性。隨著近年材料科學的蓬勃發展，二維材料一躍而上映入人們的眼簾，也開始有研究團隊應用二維材料來製作RRAM，例如h-BN, MoS2和MoTe2等。二維材料的主要製備可以透過CVD沉積與機械剝離法，而在本篇論文中則以機械剝離法為製作方法，並佐以其他製程來測試製作元件在不同環境下的表現。 首先，我們將以二硫化鉬作為主動層材料，而後透過常溫量測得到的數據找出面積對於元件開關比的關聯性，更進一步以變溫量測探討電阻值的改變，以及判斷其電流傳導特性等。其後我們亦將材料替換為六方氮化硼並發現其導電特性由於屬於較高能階材料之緣故，與二硫化鉬有所不同。 而後我們發現機械剝離法材料有較嚴重的高阻態漏流問題，並透過文獻回顧發現是由於缺乏晶格邊界缺陷導致，為了優化機械剝離法RRAM的電特性，我們希望通過製程方法在材料中製造缺陷，並解決切換時機械剝離法元件的漏流問題，以此將兩種方法的優點結合起來。在本文中，我們將透過使用RIE使得MoS2表面氧化並充斥缺陷的方法。如此一來，我們可以模擬CVD元件的晶格邊界並提高元件的開關比。 在製作單顆RRAM成功並確立其標準電性後，我們便試著將其與二維材料電晶體串接，形成一個獨立的量測單元，並觀察其在電晶體作為限流器的情形下兩者的匹配程度與RRAM是否仍能正常運作，並在後續透過其他製程手段例如氧化電漿製程與材料堆疊等成功解決兩者匹配性的問題。
並列摘要
Since AI and IoT become more and more popular, the demand of storage devices is skyrocketing. However, conventional storage devices cannot meet the requirements. For example, FLASH possess large capacity but low device endurance, and SRAM has quick data transport speed but low capacity. Therefore, a new type of memory emerges as the times require which is so-called SCM (Storage Class Memory). It is famous for its better data transport speed than FLASH and the storage capacity which is bigger than cache does, and RRAM is a member in the SCM family. Comparing with conventional memory, RRAM possess some specific characteristics: higher memory density (2-4x larger than NOR FLASH), high operation speed (~140MB/s), and better endurance (~106 times switching). RRAM is composed with TMOs (Transitional Metal Oxides) and two metal electrodes to form a MIM structure, and TMOs are used as the active layer. After that, the characteristic indexes of RRAM are established. On that basis, researchers start to find the probability of substituting the active layer material. As the development of material science, 2D materials become more and more eye-catching. Recently, there are some research groups that apply 2D materials such as h-BN, MoS2, MoTe2 to the active layer. There are mainly two methods to obtain 2D materials, mechanical exfoliation and CVD (Chemical Vapor Deposition). In this thesis, the mechanical exfoliation method is mainly adopted, and the performance of devices made under different process conditions have been investigated. First, we use molybdenum disulfide as the active layer material, and then find out the correlation between the electrode overlapped area and the switching ratio of the device through the data obtained from the measurement under room temperature, then further measure the change of resistance value at various temperature to determine its current conduction characteristics. Later, we also replace the active layer material with hexagonal boron nitride and find out that its electrical conductivity is different from that of molybdenum disulfide due to its higher band gap. Then we find that the mechanical exfoliated RRAM suffers a serious HRS leakage problem, and through paper survey we found that it is caused by the lack of grain boundary defects. To optimize electrical characteristic of mechanical exfoliated RRAM, we would like to create defects in material via process method and solve the damage problem of mechanical exfoliated device when switching, so we can combine advantages of CVD and exfoliation methods. In this thesis, we will demonstrate a method that uses RIE to induce oxygen ions and vacancy in surface of MoS2 and oxidize it. This way, we can simulate the grain boundaries like those of CVD devices and enhance the switching ratio. After successfully fabricating a single RRAM and establishing its statical standard electrical properties, we tried to connect it in series with a two-dimensional material transistor to form an independent measurement unit, in which the transistor acts as a current limiter. The degree of matching between the RRAM and transistor is investigated, and the problem of compatibility can be successfully solved later through other process methods such as plasma oxide process and material stacking.