- 學位論文
應用於局部調光液晶顯示器之內容自適應背光控制器積體電路設計
Content Adaptive Backlight Controller VLSI Design for Local Dimming Liquid Crystal Displays
摘要
本論文提出一個基於動態分析區塊並配合高斯常態分佈模型提出可適性調光設計，用以實現液晶顯示器背光控制器積體電路設計。此論文演算法運用亮度分析與預測來達到節省能源幅度，再利用影像補償演算法來補償失真影像。為了提高影像整體品質，此演算法由影像整張運算方式更改為區塊運算方式，並藉由運用動態運算區塊方式藉此達到亮度分析與預測來達到節省能源幅度。在積體電路設計中，由於必須考量到硬體成本及演算法運算複雜度的問題，利用了查表法轉換的方式來進行運算去減少高位元的乘法器及除法器，並且大量減少運算時間，並應用移位暫存器及硬體共用等技術使用在此設計中，來達到更進一步減少電路成本。在積體電路設計中，我們使用台積電0.18-μm CMOS之製程，在100 MHz的工作時達到使用12.3K gate counts 完成此電路，且此電路設計能達到200 MHz的工作頻率。與其他先前的設計相比，本論文提高了平均47.42分貝的峰值信噪比與節省了45.22％背光能源功耗，同時節省了39.14%的gate counts成本。
關鍵字
液晶顯示器背光控制並列摘要
In this thesis, a dynamic analysis block-based content adaptive backlight control algorithm based on the Gaussian normal distribution model is proposed for VLSI implementation. It composed of a local dimming backlight algorithm to reduce power consumption of the backlight module on liquid crystal displays (LCDs). The image features contrast enhancement algorithm to compensate the distortion. To improve the image quality, the proposed algorithm is developed to be block-based rather than frame-based. The VLSI architecture of this design includes a grayscale operator module, a block-base module, a brightness analysis module, a clipped point generator module, a brightness comparator module, a brightness ratio calculator module, a PWM pulse generator module, and the pixel compensator module. Because of we need to consider the cost of hardware and algorithmic computational complexity, this design used the look-up table technique to reduce the usage of high-bit multipliers and dividers. The VLSI architecture of this design contains 12.3-K gate counts by a 0.18-μm CMOS process. Compared with previous studies, this thesis not only reduces at least 39.14% hardware cost at 100 MHz but also can operate at 200 MHz. This work improved PSNR values by over 47.42 dB, and reduced LCD backlight power consumption by 45.22％.