狄拉克源電晶體開發及研究

Development and Investigation of Dirac-Source Field-Effect Transistor

陳昂寬(Ang-Kuan Chen)

指導教授 ： 吳肇欣

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2019年)

https://doi.org/10.6342/NTU201902996

摘要

隨著人們對於電子器件功耗的要求日益增加，科學家們持續進行各種嘗試，例如更換材料或是發明新的電晶體架構，使元件的操作電壓降低。狄拉克源(Dirac-source)有別於一般源極材料，其狀態密度與能量呈線性關係。由於這樣的特性，使得狄拉克源在費米能階附近時，具有比傳統材料更窄的電子密度分布，因此讓次臨界擺幅得以突破物理極限之60mV/decade，操作電壓得以有效地下降。
而在本論文中，我們將以二維材料二硫化鉬及二硒化鎢做為通道材料，並結合石墨烯，完成一狄拉克源電晶體。首先，我們先以二硫化鉬做為通道，石墨烯做為源極材料，完成一個二維異質結構電晶體，並與傳統以鈦金做為源極之電晶體進行電性比較。接著，我們以氮化硼(Hexagonal Boron Nitride, h-BN)當作介電層，結合前述之異質結構，完成初版的狄拉克源電晶體。然而，氮化硼之厚度與對準皆不易控制，不適合應用於往後的上閘極元件製作，因此我們改用較常見也較便於製程的原子層沉積 (Atomic layer deposition, ALD)的氧化鋁來當作我們介電層。
然而，由於二維材料表面缺少未鍵結電子對，使得ALD氧化層難以均勻地沉積於材料上。有鑒於此，我們在樣品表面先沉積一層兩奈米厚的種子層(seed layer)，成功提升了ALD氧化層的表面品質，亦成功使得上閘極電晶體之開關比達到106。
最後，我們將上閘極介電質的技術，與異質結構電晶體做結合，成功地完成了二硫化鉬及二硒化鎢之狄拉克源電晶體，並看到了次臨界擺幅隨控制閘極之電壓調變而降低的效果，相關的物理機制分析探討亦於內文中詳細介紹。

關鍵字

狄拉克源 ； 次臨界擺幅 ； 石墨烯 ； 二硫化鉬 ； 異質結構 ； 原子層沉積 ； 二硒化鎢 ； 控制閘極

並列摘要

To meet the need for low power devices, scientists have tried their best to find a new channel material or a new device mechanism, to lower the supply voltage of devices. Dirac-source(DS), different from normal source, has a linear DOS as a function of energy, which gives rise to a much narrower electron density distribution around the Fermi level than conventional source. Because of this characteristic, the device with DS can break the subthreshold swing limit of 60mV/decade and therefore has a lower supply voltage.
In this paper, we want to use 2D materials like MoS2 or WSe2 as channel, to fabricate a DS-FET and achieve SS lowering. At the beginning, we will demonstrate graphene-contacted MoS2 back-gate FETs, show the electrical characteristics and compare with Ti-contacted ones. Next, we use hexagonal boron nitride (h-BN) as top-gate dielectric, and combine it with graphene-contacted MoS2 back-gate FET to complete a prototype of DS-FET. However, we find that it is very hard to control the position and thickness of h-BN, so we switch to ALD process to form the top-gate dielectric.
Nevertheless, because 2D material lacks of dangling bonds on its surface, we have difficulty forming a uniform ALD Al2O3 film on it. To solve the problem, we evaporate a 2nm E-gun Al2O3 seed layer before ALD process, and successfully improve the quality of the ALD Al2O3 film. We utilize this top-gate dielectric technique to fabricate a 2D top-gate FET with ION/IOFF~106.
Finally, we combine top-gate dielectric technique with graphene-contacted MoS2 back-gate FETs, to fabricate MoS2 DS-FET and WSe2 DS-FET. We also complete the measurement and analysis, and the phenomenon of SS lowering is observed with various control-gate biases. Further mechanism and analysis will be introduced in the articles.

並列關鍵字

Dirac-source ； Subthreshold Swing ； Graphene ； MoS2 ； Hetero-structure ； Atomic Layer Deposition ； WSe2 ； control-gate

參考文獻

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