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  • 學位論文

MTS/MTO晶圓廠日投料與派工決策

Job Daily Release and Dispatching Policies for MTS/MTO Semiconductor Fabs

指導教授 : 巫木誠

摘要


本研究以現實環境中一個晶圓代工廠作為實驗案例,探討此晶圓代工廠前段製程之日投料決策與派工決策。在此晶圓代工廠中,投料工單有兩種-訂單式產品工單、庫存式產品工單。在代工廠的前段製程中,會經過許多的批次工作站。庫存式產品工單每15天指派一次給生產規劃部門,訂單式產品每3天指派一次給生產規劃部門。本研究之目的為找出最佳投料組合與派工決策,以使得產品之平均生產週期最小化。在派工決策的部分,序列機台是使用先進先出法,而批次工作站則是使用最大等候時間(T_max^i)作為其派工準則。批次工作站i在下列情況下開始進行加工-等候區其中一個工件之等候時間達到T_max^i、等候區之工件數量達到滿批量。假設在晶圓代工廠中有K個批次工作站,每個批次工作站之等候時間設定有n個等級,則批次工作站等候時間組合之解空間總共有n^K種組合。我們使用基因演算法從n^K種組合中尋找出近似最佳解。實驗結果顯示,此投料與派工決策相對於此晶圓代工廠現行之方法,在生產績效上有顯著地提升。

並列摘要


This research investigates the daily job release decision and the job dispatching decision for a front-end process in a example semiconductor fab. The production orders in the fab are of two types: make-to-order (MTO) and make-to-stock (MTS). The front-process is a flow shop which involves a substantial amount of batch workstations. The MTS orders are released to the production planning department every 15 days while the MTO orders are released every three days. This research aims to find an optimal combination of job release and job dispatching decisions in order to minimize the average cycle time. We develop a linear programming model to solve the daily job release decision. In job dispatching decisions, we use the FIFO (first-in-first-out) policy for series machines and use a maximum waiting time (T_max^i) criterion for the dispatching of batch workstation i; that is, batch workstation i starts processing when one of its WIP waits up to T_max^i or a full batch of WIP jobs are available. Suppose there are K batch workstations in the fab and each batch workstation i (1≤i≤K) has n possible values for setting T_max^i. Then the solution space for the dispatching batch workstation involves n^Kalternatives. We develop a genetic algorithm to find a near-optimal one out of the n^Kalternatives. According to numerical experiments, the combination of the proposed job release method and job dispatching method substantially outperform the method currently used in the example fab.

參考文獻


吳玫慧,以瓶頸機台負荷評估晶圓廠投料決策,交通大學工業工程與管理學系碩士論文,2014 年
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2. Cheng, B. Y., Yang, S. L., Hu, X. X., and Chen, B. 2012. “Minimizing makespan and total completion time for parallel batch processing machines with non-identical job sizes.” Applied Mathematical Modelling 36: 3161-3167.
3. Glassey, C. R., and Resende, M. G. C. 1988. “Closed-Loop Job Release Control for VLSI Circuit Manufacturing.” IEEE Transactions on Semiconductor Manufacturing, Vol.1, No. 1: 36-46.
4. Hung, Y. F., and Leachman, R. C. 1996. “A Production Planning Methodology for Semiconductor Manufacturing Based on Iterative Simulation and Linear Programming Calculations.” IEEE Transactions on Semiconductor Manufacturing, Vol. 9, No. 2: 257-269.

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