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Low Temperature Polycrystalline Silicon Thin Film Transistors Fabricated by Amorphous Silicon Spacer Structure with Pre-Patterned TEOS Oxide Layer

並列摘要


In this paper, location-controlled grain growth with α-Si spacer structure was fabricated. Consequently, High-performance poly-Si TFTs with field-effect mobility exceeding 367cm^2/V-s and high device uniformity have been fabricated. The excellent electrical characteristics is attributed to large grain and grain boundary elimination in the channel region.

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被引用紀錄


Chin, H. A. (2010). 氧化鋅鎂/氧化鋅多晶異質結構系統之電性探討 [master's thesis, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU.2010.00249
連培勛(2015)。紅色主客體有機材料摻雜比例對於白光有機發光二極體電激發光性質之影響〔碩士論文,國立中正大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0033-2110201614040178

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