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H.264/AVC情境適應性二元算術解碼器設計與實作

Design and Implementation of H.264/AVC CABAC Decoder

摘要


本文提出一個高效率及低成本的情境適應性二元算術解碼器(CABAC Decoder),在情境適應性二元算術解碼演算法中,因為解碼每個二元值(bin)間存在著高度的資料相依性,導致於很難進行平行化的運算,因此,我們設計一個新的管線架構來加快解碼速度,另外,根據不同的句法元素(syntax element),我們也提出兩個增加產出量的方法;為了降低記憶體的使用量和存取次數,我們根據兩項原則來重新安排情境模式(context model)在記憶體中的擺放方式。本情境適性二元算術解碼器已經整合在一個H.264的解碼器中,且對於H.264高等型級(high profile)等級4.1(level 4.1)的高解析度(HD)資料流能達到及時解碼,本設計在使用0.18矽製程合成下,可達250 MHz的工作頻率且僅使用35,615個邏輯閘。

並列摘要


In this paper, we present a high-throughput and low-cost context adaptive binary arithmetic coding (CABAC) decoder for H.264/AVC. It is difficult to perform parallel processing while decoding a plurality of bins due to the strong data dependency among them. We propose a novel pipeline architecture to speed up its operations. Based on different types of syntax elements, two approaches to improve throughput are proposed. Additionally, we re-arrange the context models in memory by applying two principles in order to reduce the usage of memory space and to lower the frequency in memory accessing. The proposed CABAC decoder has been integrated into a H.264 decoder and is able to achieve real-time decoding for H.264/AVC High Profile HD level 4.1. The implemented design can operate at 250 MHz with 35.6k gate count under 0.18μm silicon technology.

被引用紀錄


Liu, Y. N. (2014). 自我驗證像素內插框架及其相關演算法與硬體架構設計 [doctoral dissertation, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU.2014.02270
Wang, Y. T. (2010). 利用感知特性及移動補償技術提升畫面禎幅率之演算法及硬體架構設計 [master's thesis, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU.2010.00196
Chu, C. W. (2005). H.264畫面內編碼電路之設計與製作 [master's thesis, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU.2005.00360

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