本文係利用田口式實驗法,並使用自行研製之機電式動態放電加工鍍層試驗機實驗,探討在供應電壓、放電間隙距離、放電持續時間及放電休止時間等參數條件下對鍍層影響之機制,求取實驗之最佳化實驗參數,並且使用光學顯微鏡及掃瞄式電子顯微鏡(SEM)觀察鍍層表面形貌,探討實驗參數對鍍層厚度之影響。由田口式實驗法分析得知,表面粗糙度最佳化製程參數組合為A2B3C3D1,鍍層表面均勻性最佳化製程參數組合為A2B1C3D1,鍍層剖面厚度最佳化製程參數組合為A2B2C1D3。實驗結果得知,鍍層厚度會隨著放電加工時間增加而增加,當時間達到142s後,則鍍層厚度會隨著加工時間的增加而減少;在相同的放電加工時間下,鍍層厚度隨著供應電壓的增加而增加,當電壓達200V後,鍍層厚度會隨著供應電壓的增加而減少;在相同的供應電壓下,則鍍層厚度隨著放電間隙距離的增加而增加。
In this paper, the effects of supply voltage, gap distance, pulse-on and pulse-off duration time on the mechanism of coating layer are studied by Taguchi Method and a specific designed EDC tester. The optimal parameters for the surface modification of the coating layer have been obtained. Moreover, the surface profile of the coating layer is observed by using the optical microscope and SEM to evaluate the effects on the thickness of coating layer. The results show that the optimal parameters combination for the surface roughness is A2B3C3D1, A2B1C3D1 for the coating layer distribution and A2B2C1D3 for the coating layer thickness. The experimental results also show that the coating thickness increases with increasing process time, but decreases with increasing after process time over 142 seconds. However, at the same process time, the coating thickness increases with increasing supply voltage, but decreases with increasing after supply voltage over 200 Volts. Furthermore,, the coating layer thickness increases with increasing gap distance under the same supply voltage.