透過您的圖書館登入
IP:3.19.30.232
  • 期刊

以堆疊式閘極介電層實現具有優異電流趨動能力與可靠度之高效能鰭式電晶體

Enhanced FinFET Performance by Stacked Gate Dielectric Featuring Higher Current Drive Capability and Superior Reliability

摘要


本研究以兩層不同高介電材質(HK Dielectric) 之堆疊結構閘極介電層探討其應用於20nm 以下鰭式電晶體(FinFET) 技術之可行性。與單層閘極介電層相較之下,採用堆疊結構閘極介電層之電晶體顯示了20 %-22 % 的驅動電流(Drive Current)改善以及~22% 的轉導(Transconductance, gm) 增加。此電晶體效能的提升,除了4% 的閘極電容增加外,最主要可歸因於~33% 的載子遷移率增加。由電子損失能量光譜(EELS) 和X 射線光電子能譜儀(XPS) 物性分析結果證實,堆疊結構閘極介電層其內部確實擁有較少的氧空缺(Oxygen Vacancy) 數量,因此可減少通道載子受到氧空缺造成的遠端庫倫散射效應影響,進而提升了通道載子的遷移率。另一方面,也由於較少的氧空缺,偏壓溫度不穩定性(Bias Temperature Instability, BTI) 和加速壽命測試(Lifetime Test) 的結果亦證實堆疊結構閘極介電層享有較佳的可靠度表現。最重要地,此堆疊結構閘極介電層所採用的兩種高介電材質目前普遍使用於半導體廠且完全相容於現有的積體電路製程技術,使得堆疊結構閘極介電層成為應用於下一世代鰭式電晶體之前瞻技術。

並列摘要


HK-2/HK-1 stacked dielectric was proposed as the gate dielectric for sub-20 nm FinFET technology. Compared to single HK-1 dielectric, the stacked gate dielectric exhibits superior performance in terms of improved drive current by 20~22% and increased transconductance by ~22%. The main reason accounting for the better performance, besides the higher gate capacitance by 4%, is the enhanced carrier mobility by ~33% resulting from less remote scattering due to smaller amount of charged oxygen vacancies which was physically confirmed by EELS and XPS. Owing to the reduced oxygen vacancies, from bias temperature instability and lifetime test, the stacked gate dielectric demonstrates augmented reliability as well. Most importantly, HK-1 and HK-2 are common dielectrics completely compatible with typical processes, rendering the stacked dielectric a promising one for next-generation FinFETs technology.

延伸閱讀