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三維非絲狀路徑電阻式記憶體陣列於類神經網路運算之應用

3D Synaptic Array forHardware Neural Network Applications

摘要


近年來,為了實現能加速人工智慧運算的硬體類神經網路,許多研究正積極發展一具類比權重儲存能力的低能耗、高密度仿生突觸陣列。在這篇文章中,我們回顧過去所提出之三維Ta/TaO_x/TiO_2/Ti交點式突觸陣列結構,此結構模仿人腦中的網路架構,且藉由增強和抑制訊號作調整可以達到至少50個類比突觸權重值。我們也提出一種與元件電導狀態無關的雙極性波形訓練模式,可以有效改善元件權重更新的非線性,此改善可以幫助增加神經網路訓練的準確率。

並列摘要


A low-power, high-density, and analog electronic synaptic array is actively researched recently for implementing hardware neural networks (HNNs) that accelerate the computing in artificial intelligence. In this paper, we review a three-dimensional Ta/TaO_x/TiO_2/Ti cross-point synaptic array that resembles the neural network structure in the human brain. At least 50 analog synaptic weight states could be precisely modulated by controlling stimuli of potentiation and depression pulses. We also provide a state-independent bipolar-pulse writing pulse scheme that improves the linearity of weight updates. The improved linearity could enhance training accuracy in neural network algorithms..

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