利用轉換器回授方式於5.8-GHz之CMOS低雜訊放大器

本論文提出一個應用於5.8 GHz無線區域網路的低雜訊放大器之設計。利用TSMC 0.18μmCMOS的製程，為了達到1伏特低電壓與低功率的需求，吾人利用轉換器回授中和化法來降低閘—汲極電容（Cgd）所產生的密勒效應，以進行放大器設計。首先本論文將先描述轉換器回授放大器設計的原理及方法，接著設計差動式單石轉換器的結構，除了利用電磁模擬程式模擬此元件高頻的特性，分析其電路特性，並利用集總元件來建立差動式轉換器的等效電路模型。接著將所得到高頻模型置入放大器電路進行設計，研究與探討單石電感與轉換器的寄生效應及損耗對電路的影響。在考量被動元件實際電磁模擬結果與最佳化設計後，本論文所使用的電路架構，經過電路模擬結果可達到功率增益為13.2 dB、雜訊指數約為2.7 dB、輸入損耗反射係數為-22.7 dB、輸出損耗反射係數為- 13.8 dB、逆向隔離度為-38.3 dB及IIP3為6.8 dBm，最後並進行電路佈局與實驗討論。

關鍵字

低雜訊放大器；單石轉換器；低電壓設計；中和化；轉換器回授

並列摘要

In this paper, we present the whole design of a low noise amplifier in a 0.18μm CMOS process for 5.8 GHz wireless local area network application. To operate at 1 V low-voltage supply and 16 mW low-power consumption, transformer-feedback technique is employed here to neutralize the gate-drain overlap-capacitance of a MOSFET, i.e., Miller effect. First in this paper, the design approach of the transformer-feedback LNA is described in detail. Second, differentially monolithic-transformer structure is designed, analyzed, and its lumped-element equivalent circuit model is also proposed to characterize its performance. Then, parasitic effect of lossy monolithic-inductor and transformer were studied and included in the simulation of the whole practical design. Their influences on noise and power gain are discussed and then circuit optimization is performed. The simulation results of final design show that the real design can achieve a power gain of 13.2 dB, noise figure of 2.7dB, input return loss of -22 .7 dB, output return loss of -13.8 dB, reverse isolation of -38 .3 dB, and input third-order intercept-point of 6.8 dBm. Finally, the low voltage-supply LNA based on transformer-feedback technique and internal input-matching circuit is layouted and measurement set-up is discussed for verification.

並列關鍵字

LNA ； monolithic transformer ； low-voltage design ； neutralization ； transformer-feedback

國際替代計量

利用轉換器回授方式於5.8-GHz之CMOS低雜訊放大器

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