- 期刊
Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools
延伸閱讀
- 陳聖彥（2014）。Routing-Architecture-Aware Analytical Placement for Heterogeneous FPGAs〔碩士論文，國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2014.10276
- Yen, C. C. (2022). Effective Reconfigurable Multiplication and Integrated Memory Distribution on FPGAs [doctoral dissertation, National Taiwan University]. Airiti Library. https://doi.org/10.6342/NTU202200528
- Mhaske, S., Kee, H., Ly, T., Aziz, A., & Spasojevic, P. (2017). FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level Synthesis. International Journal of Reconfigurable Computing, 2017(), 1-23-004. https://doi.org/10.1155/2017/3689308
- Chang, Y. (2004). Using FPGA Implement a Partial Reconfigurable Architecture of Embedded System [master's thesis, Yuan Ze University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0009-0112200611300018
- 邢弘霖（2007）。Design of a Real-Time Embedded Software Synthesis Tool for FPGA Systems〔碩士論文，國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-2707200717090600