微型化近橫向電磁合成傳輸線CMOS主動濾波器設計

Design of Miniaturized Synthetic Quasi-TEM Transmission-Line-Based CMOS Active Filter

李孟霖(Meng-Lin Lee)

指導教授 ： 莊晴光

國立臺灣大學/電機資訊學院/電信工程學研究所/博士(2011年)

https://doi.org/10.6342/NTU.2011.00371

摘要

本論文係討論高微型化三階主動微波帶通(bandpass)濾波器之設計，其實現於標準0.18-μm互補式金屬氧化物半導體(CMOS)1P6M製程在480 μm厚的矽基板上，中心頻率在1.58 GHz且面積為0.58% λ0 × 0.44% λ0，λ0是中心頻率在真空中的波長。在論文中，針對微型化程度與電氣特性來評價目前文獻所發表以半導體技術實現之射頻帶通濾波器，其結果以一圖來表示，由該圖顯示本文所提的CMOS主動濾波器為當今微型化程度最高的單晶主動濾波器，且其微型化程度趨近目前商用的FBAR帶通濾波器。本文提出新型合成傳輸線，該傳輸線不但承襲互補式金屬傳輸線(complementary-conducting-strip transmission line, CCS TL)具靈活合成導波特性，更進一步的能減少傳輸線所佔的面積而不會增加傳輸損耗。如此的傳輸線使得本文的CMOS主動帶通濾波器達到高微型化。此外，改良的nMOS交錯偶合對(cross-coupled pair)產生隨頻率變化的負電阻來補償傳輸線共振器裡隨頻率變化的損耗以增加共振器品質因子(quality factor)。如此，CMOS主動帶通濾波器不但能獲得足夠的補償以降低插入損耗(insertion loss)，且能維持通帶(passband)平坦度並提升穩定度。基於上述技術，設計一階數皆為三以合成傳輸線為基礎具低通帶變形的CMOS主動帶通濾波器，所佔面積為1099.47 μm × 837.48 μm或為0.58 % λ0 × 0.44 % λ0。在1.8 V電源供應下消耗8 mA的電流，1.58 GHz中心頻率的插入損耗為0.68 dB。通帶頻寬為8% 且回流損失(Return Loss)大於16 dB。通帶漣波(passband ripple)為1.24 dB。
另外，針對已封裝1.53-GHz CMOS含晶片裡(on-chip) ESD保護電路的主動帶通濾波器由晶片設計到封裝完整的討論寬上截止帶抑制(wide upper stopband suppression) 設計。在現存的文獻中這是第一次針對單晶射頻主動濾波器討論通帶外的訊號抑制。複合式並聯共振器(composite parallel resonator)裡的退化式nMOS交錯偶合對(degenerate nMOS cross-coupled pair)不但對共振頻率的訊號補償，也對奇諧波假象(spurious)訊號補償。在此藉由電容負載式傳輸線共振器的方式來控制假象(spurious)訊號產生位置，使得單晶CMOS主動帶通濾波器具寬上截止帶抑制。而該CMOS主動帶通濾波器的晶片以chip-on-board (COB) 方式來封裝，封裝後全部的面積為3.71 mm × 2.50 mm。由等效集總(lumped)電路分析，封裝裡的接地磅線所伴隨而來的寄生電感將對通帶外訊號抑制造成影響，而此寄生效應會在封裝設計中降低。另外，磅線長度變異對於上截止帶訊號抑制的影響亦在本論文裡討論。此封裝後CMOS主動帶通濾波器在3V的電源供應下消耗8 mA的電流，中心頻率(f0) 1.53 GHz的插入損耗為0.95 dB而通帶頻寬為3.1%。通帶外，在2f0與3f0的頻率響應抑制各為44.57 dB與52.78 dB，而截止帶的抑制由1.09f0到10.05f0超過35 dB。 ESD保護能力量測顯示該單晶主動濾波器的RF埠在人體放電模式(Human-Body Model, HBM)下具有500 V的靜電保護能力。最後在-40℃到+80℃升溫測試中，該封裝後CMOS主動帶通濾波器的中心頻率漂移由1.587 GHz 到 1.479 GHz而飄移率為-0.9 MHz/℃。

關鍵字

CMOS, active bandpass filter (BPF), negative conductance, spurious response, stopband suppression

並列摘要

This dissertation presents a design of high miniaturized third-order transmission- line-based (TL-based) active bandpass filter (BPF), which is fabricated using standard 0.18-μm complementary metal-oxide-semiconductor (CMOS) one-poly six-metal (1P6M) technology on a silicon substrate with a thickness of 480 μm and designed at the central frequency of 1.58 GHz in a chip area of 0.58% λ0 × 0.44% λ0, λ0 is the free-space wavelength at the central frequency. In this dissertation, the RF BPFs, which are fabricated in semiconductor technologies and presented in the published literature, are assessed against the degree of miniaturization and acceptability of performance. The statistics are summarized in a figure, which reveals that the CMOS TL-based active BPF herein has the lowest normalized area per resonator of active BPFs and the degree of miniaturization approaches the one of commercial FBAR devices. The new synthetic transmission line proposed in this dissertation has the widely flexibilities on the syntheses of guiding characteristics, like complementary-conducting-strip transmission line (CCS TL), and can further reduce the occupied chip area without compromising the transmission loss. Thus, such a synthetic transmission line enables the CMOS TL-based active BPF herein to be substantially miniaturized. Moreover, the frequency dependent negative conductance, which is produced from a modified nMOS cross-coupled pair, compensates for the frequency dependent loss in the TL-based resonator to enhance the quality factor (Q factor) of a composite parallel resonator. Therefore, the CMOS TL-based active BPF acquires adequate loss compensation to reduce the insertion loss with good passband flatness and the stability is also improved. Based on the techniques mentioned above, an CMOS third-order TL-based active BPF with low passband disturbance is designed in a chip area of 1099.47 μm × 837.48 μm or 0.58% λ0 × 0.44% λ0. The prototype consumes a current of 8.0 mA from 1.8 V and has 0.68-dB insertion loss at the central frequency of 1.58 GHz. The 3dB bandwidth is 8% with the return losses more than 16 dB. The passband ripple is 1.24 dB.
Additionally, the comprehensive design of wide upper stopband suppression for a packaged 1.53 GHz CMOS active bandpass BPF with on-chip electrostatic discharge (ESD) protection circuits is developed from the chip level to the package in the second part of this dissertation. So far, this is the first time that outband spurious responses are discussed and presented in the design of RF monolithic active BPF. In a composite parallel resonator, not only the signal at fundamental frequency but also the spurious ones at odd-harmonic frequencies are enhanced by the degenerate nMOS cross-coupled pair. The spurious responses are controlled and shifted towards higher frequencies by using the capacitively loaded TL resonator method in the COMS active BPF design to achieve wide upper stopband suppression. The fabricated chip of the aforesaid CMOS active BPF is packaged using the chip-on-board (COB) process in an area of 3.71 mm × 2.50 mm. In the lumped equivalent circuit analysis, the ground bondwires, which accompany the parasitic inductor at ground, in COB package influence the stopband suppression of the packaged CMOS active BPF and this parasitic effect is minimized in the package design. In addition, the influences of the variation in length per bondwire on the stopband suppression are also demonstrated. Measurement results indicate that the packaged CMOS active BPF has 0.95-dB insertion loss at a central frequency (f0) of 1.53 GHz with a 3dB bandwidth of 3.1%, while a current of 8 mA is consumed from 3.0 V. The stopband suppressions at 2f0 and 3f0 are 44.57 dB and 52.78 dB, respectively. Furthermore, the suppression exceeds 35 dB from 1.09f0 to 10.05f0. The ESD tests demonstrate that the two RF ports of the prototype have the Human-Body Model (HBM) ESD protection level of 500 V. Finally, in the temperature variation measurement, the central frequency of the prototype shifts from 1.587 to 1.479 GHz with a shift rate of -0.9 MHz/℃ from -40℃ to +80℃.

並列關鍵字

金屬氧化物半導體, 主動帶通濾波器, 負阻抗, 假象訊號, 截止帶抑制

參考文獻

[1] R. C. Frye, L. Kai and L. Yaojian, “Three-stage bandpass filters implemented in silicon IPD technology using magnetic coupling between resonators,” in IEEE MTT-S Int. Microw. Symp. Dig., 2008, pp. 783–786.

[3] H.-T. Tso and C.-N. Kuo, “40 GHz miniature bandpass filter design in standard CMOS process,” in Silicon Monolithic Integr. Circuits RF Syst. Top. Meeting, Atlanta, GA, Sep. 2004, pp. 239–242.

[4] C.-L. Yang, S.-Y. Shu and Y.-C. Chiang, “Analysis and design of a chip filter with low insertion loss and two adjustable transmission zeros using 0.18-μm CMOS Technology,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 1, pp. 176–184, Jan. 2010.

[5] C.-K. C. Tzuang, H.-H. Wu, H.-S. Wu, and J. Chen, “CMOS active bandpass filter using compacted synthetic quasi-TEM lines at C-band,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4548–4555, Dec. 2006.

[6] M.-J. Chiang, H.-S. Wu, and C.-K. C. Tzuang, “A 3.7-mW zero-dB fully integrated active bandpass filter at Ka-band in 0.18-μm CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig., 2008, pp. 1043–1046.